Task Scheduling with Configuration Prefetching and Anti-Fragmentation techniques on Dynamically Reconfigurable Systems

Aim of this paper is to define a scheduling of the task graph of an application that minimizes its total execution time on a partially dynamically reconfigurable FPGA. The sched-uler has to take into account the reconfiguration overhead of each task, the area constraint of the target FPGA, the prece-dences between the tasks, configuration prefetching andmod-ule reuse. We introduce an ILP formulation to solve the task scheduling problem in the reconfigurable architecture sce-nario. This formulation has been used to identify interesting features for a possible heuristic scheduler. The results of the ILP solution show how a reconfiguration-aware scheduler ex-ploiting all the reconfiguration features can outperform one with partial knowledge. 1