International audienceIn this paper two lost-cost solutions for providing error detection capabilities to processor-based systems are compared. The effects of SEUs and SETs is studied through simulation-based fault injection which is used to compare the error detection capabilities of a hardware-implemented solution, based on parity code, with that of a software-implemented solution based on source-level code modification. Radiation testing experiments confirmed the obtained results
The use of microprocessor-based systems is gaining importance in application domains where safety is...
ISBN 978-1-4673-2355-0International audienceAn approach to study the effects of soft errors by fault...
There is broad consensus among academic and industrial researchers in computer architecture that har...
In this paper, two low-cost solutions devoted to provide processor-based systems with error-detectio...
This paper presents a detailed analysis of the efficiency of software-based techniques to mitigate S...
International audienceIn this paper, proposed software tools for predicting the rate and nature of o...
In this paper are first summarized representative examples of anomalies observed in systems operatin...
International audienceThis paper describes two different but complementary approaches that can be us...
International audienceIn this paper is described a purely software technique allowing to detect SEUs...
International audienceSingle Event Upset (SEU) phenomena is becoming a major concern in applications...
Modern processors embed features such as pipelined execution units and cache memories that can hardl...
International audienceThis paper presents a new fault injection method based on the CEU (Code Emulat...
ISBN : 978-1-4244-1665-3International audienceThis paper deals with the prediction of SEU error rate...
Software-based fault tolerance techniques are a low-cost way to protect processors against soft erro...
Abstract—An approach to study the effects of single event upsets (SEU) by fault injection performed ...
The use of microprocessor-based systems is gaining importance in application domains where safety is...
ISBN 978-1-4673-2355-0International audienceAn approach to study the effects of soft errors by fault...
There is broad consensus among academic and industrial researchers in computer architecture that har...
In this paper, two low-cost solutions devoted to provide processor-based systems with error-detectio...
This paper presents a detailed analysis of the efficiency of software-based techniques to mitigate S...
International audienceIn this paper, proposed software tools for predicting the rate and nature of o...
In this paper are first summarized representative examples of anomalies observed in systems operatin...
International audienceThis paper describes two different but complementary approaches that can be us...
International audienceIn this paper is described a purely software technique allowing to detect SEUs...
International audienceSingle Event Upset (SEU) phenomena is becoming a major concern in applications...
Modern processors embed features such as pipelined execution units and cache memories that can hardl...
International audienceThis paper presents a new fault injection method based on the CEU (Code Emulat...
ISBN : 978-1-4244-1665-3International audienceThis paper deals with the prediction of SEU error rate...
Software-based fault tolerance techniques are a low-cost way to protect processors against soft erro...
Abstract—An approach to study the effects of single event upsets (SEU) by fault injection performed ...
The use of microprocessor-based systems is gaining importance in application domains where safety is...
ISBN 978-1-4673-2355-0International audienceAn approach to study the effects of soft errors by fault...
There is broad consensus among academic and industrial researchers in computer architecture that har...