This article proposes a software error mitigation approach that uses the single instruction multiple data (SIMD) coprocessor to accelerate computation over redundant data. In addition, an external IP connected to the microprocessor's trace interface is used to detect errors that are difficult to cover with software-implemented techniques. The proposed approach has been implemented in an ARM microprocessor, and an irradiation campaign with neutrons has been carried out at Los Alamos National Laboratory. Experimental results demonstrate the high error coverage (more than 99.9%) of the proposed approach. The neutron cross section of errors that were not corrected nor detected was reduced by more than three orders of magnitude
This work presents a hybrid error detection architecture that uses ARM PTM trace interface to observ...
Modern processors continue to aggressively scale down the feature size and reduce voltage levels to ...
ARM processors are leaders in embedded systems, delivering high-performance computing, power efficie...
This article proposes a software error mitigation approach that uses the single instruction multiple...
This paper presents a solution for error detection in ARM microprocessors based on the use of the tr...
This work proposes a methodology to diagnoseradiation-induced faults in a microprocessor using the h...
The use of microprocessor-based systems is gaining importance in application domains where safety i...
The use of commercial-off-the-shelf (COTS), cutting-edge processing systems in space applications ha...
Software-based techniques offer several advantages to increase the reliability of processor-based sy...
This paper analyzes the suitability of single-instruction multiple data (SIMD) extensions of current...
Hybrid error-detection techniques combine software techniques with an external hardware module that ...
This work explores the diagnosis capabilities of the enriched information provided by microprocessor...
Software-based fault tolerance techniques are a low-cost way to protect processors against soft erro...
The improvement of dependability in computing systems requires the evaluation of fault tolerance mec...
The negative impact of the aggressive scaling of technology nodes on the sensitivity of CMOS devices...
This work presents a hybrid error detection architecture that uses ARM PTM trace interface to observ...
Modern processors continue to aggressively scale down the feature size and reduce voltage levels to ...
ARM processors are leaders in embedded systems, delivering high-performance computing, power efficie...
This article proposes a software error mitigation approach that uses the single instruction multiple...
This paper presents a solution for error detection in ARM microprocessors based on the use of the tr...
This work proposes a methodology to diagnoseradiation-induced faults in a microprocessor using the h...
The use of microprocessor-based systems is gaining importance in application domains where safety i...
The use of commercial-off-the-shelf (COTS), cutting-edge processing systems in space applications ha...
Software-based techniques offer several advantages to increase the reliability of processor-based sy...
This paper analyzes the suitability of single-instruction multiple data (SIMD) extensions of current...
Hybrid error-detection techniques combine software techniques with an external hardware module that ...
This work explores the diagnosis capabilities of the enriched information provided by microprocessor...
Software-based fault tolerance techniques are a low-cost way to protect processors against soft erro...
The improvement of dependability in computing systems requires the evaluation of fault tolerance mec...
The negative impact of the aggressive scaling of technology nodes on the sensitivity of CMOS devices...
This work presents a hybrid error detection architecture that uses ARM PTM trace interface to observ...
Modern processors continue to aggressively scale down the feature size and reduce voltage levels to ...
ARM processors are leaders in embedded systems, delivering high-performance computing, power efficie...