This paper presents a solution for error detection in ARM microprocessors based on the use of the trace infrastructure. This approach uses the Program and Instrumentation Trace Macrocells that are part of ARM's CoreSight architecture to detect control-flow and data-flow errors, respectively. The proposed approach has been tested with low-energy protons. Experimental results demonstrate high accuracy with up to 95% of observed errors detected in a commercial microprocessor with no hardware modification. In addition, it is shown how the proposed approach can be useful for further analysis and diagnosis of the cause of errors
The use of microprocessor-based systems is gaining importance in application domains where safety i...
This thesis addresses three important steps in the selection of error detection mechanisms for micro...
Microprocessor-based systems are employed in an increasing number of applications where dependabilit...
This paper presents a solution for error detection in ARM microprocessors based on the use of the tr...
This work presents a hybrid error detection architecture that uses ARM PTM trace interface to observ...
This article proposes a software error mitigation approach that uses the single instruction multiple...
This work proposes a methodology to diagnoseradiation-induced faults in a microprocessor using the h...
The use of commercial-off-the-shelf (COTS), cutting-edge processing systems in space applications ha...
This work explores the diagnosis capabilities of the enriched information provided by microprocessor...
ARM processors are leaders in embedded systems, delivering high-performance computing, power efficie...
Hybrid error-detection techniques combine software techniques with an external hardware module that ...
The improvement of dependability in computing systems requires the evaluation of fault tolerance mec...
The use of microprocessor-based systems is gaining importance in application domains where safety i...
This thesis addresses three important steps in the selection of error detection mechanisms for micro...
Microprocessor-based systems are employed in an increasing number of applications where dependabilit...
This paper presents a solution for error detection in ARM microprocessors based on the use of the tr...
This work presents a hybrid error detection architecture that uses ARM PTM trace interface to observ...
This article proposes a software error mitigation approach that uses the single instruction multiple...
This work proposes a methodology to diagnoseradiation-induced faults in a microprocessor using the h...
The use of commercial-off-the-shelf (COTS), cutting-edge processing systems in space applications ha...
This work explores the diagnosis capabilities of the enriched information provided by microprocessor...
ARM processors are leaders in embedded systems, delivering high-performance computing, power efficie...
Hybrid error-detection techniques combine software techniques with an external hardware module that ...
The improvement of dependability in computing systems requires the evaluation of fault tolerance mec...
The use of microprocessor-based systems is gaining importance in application domains where safety i...
This thesis addresses three important steps in the selection of error detection mechanisms for micro...
Microprocessor-based systems are employed in an increasing number of applications where dependabilit...