Compilation and management of phaseoptimized reconfigurable systems

A program phase is an interval over which the working set of the program remains more or less constant. This paper presents a dynamic optimization scheme which uses pro-gram phase information to optimize designs for reconfig-urable computing. We present a mathematical formulation of the optimization problem and propose a solution which comprises of: (1) A hardware compilation scheme for gen-erating configurations that are specialized for different phases of execution. (2) A runtime system which manages interchange of these configurations to maintain specializa-tion between phase transitions. We report experimental re-sults for Xilinx Virtex FPGAs involving OpenGL SPECview-perf benchmarks and demonstrate 95.39 % speedup over an optimized uniform rate static design and 11.13 % speedup over an optimized multi-initiation interval static design. We present a framework for a posteriori performance analysis and architectural exploration with which we (a) establish a performance upper bound under perfect phase optimiza-tion, (b) investigate sensitivity to reconfiguration time, (c) examine the quality of the proposed algorithm for phase-detection. The optimization is shown to be surprisingly in-sensitive to increased reconfiguration time. Faster recon-figuration yields limited benefits and performance improve-ments are possible upto 1 second reconfiguration time. 1