Design and simulation of a new approach for reconfiguration overhead reduction in RTR systems

The advantage of RTR systems usually comes with some costs. Necessary time for mapping some areas of a program to FPGA is considerable and affects the performance of RTR systems. Configuration compression can reduce the total number of write operations to load a configuration and it has been proved as an efficient technique to deal with the configuration overhead. In this paper, we have developed a new approach for reconfiguration overhead reduction in Xilinx Virtex FPGAs by using compression technique. Since the order of sequence of configuration frames affects the compression rate, we have used genetic algorithm for finding an optimal configuration sequence of frames. 1