Dynamically Reconfiguring through Phase Detection on FPGA

Previous researches have shown some approaches on hardware phase detection. In this work, we propose a new framework based on Xilinx Virtex-6 platform for the implementation of task-optimized coarse-grained reconfiguration that can be reconfigured to adapt to the applications’ behavior. We use MicroBlaze as a general-purpose processor and a ρ-VEX VLIW architecture as reconfigurable cores. A run-time component called supervisor, dynamically monitors the system behavior, and triggers the reconfiguration; we also propose a Profiler component that automatically obtains the phase information. The collected data can be used to guide dynamic reconfiguration on the FPGA