Wake-up logic is responsible for informing instructions in the Window that are waiting to execute, about the availability of their input operands. The conventional method of wake-up consumes a significant percentage of the Instruction Window energy. Reducing the wake-up energy also addresses the Instruction Window hot spot problem caused due to the high power density of the Instruction Window. In this work, we investigate the energy and power savings of a low complexity scheme that stores the dependence relations between instructions in an array and uses this array to simplify the wake-up. We then present a new wake-up scheme that further reduces the wake-up energy by using a smaller table to store dependence relations and dynamically allo...
For the most recent CMOS feature sizes (e.g., 90nm and 65nm), leakage power dissipation has become a...
The evolution of computer systems to continuously improve execution efficiency has traditionally emb...
My thesis explores the effectiveness of software techniques that bend digital abstractions in order ...
The instruction window is a critical component and a major en-ergy consumer in out-of-order supersca...
The issue logic of a dynamically-scheduled superscalar processor is a complex mechanism devoted to s...
Many programs exhibit application level error resilience which allows certain subcomputations to exe...
Abstract. Dynamic instruction scheduling logic is one of the most critical components of modern supe...
CMOS technology scaling improves the speed and functionality of microprocessors by reducing the siz...
Energy efficiency is increasingly important with wider use of batterypowered devices. There are man...
While the central window implementation in a superscalar processor is an effective approach to wakin...
The information and communication technology (ICT) sector is consuming an increasing proportion of g...
New low power solutions for Very Large Scale Integration (VLSI) are proposed. Especially, we focus o...
Power gating is a technique commonly used for runtime leakage reduction in digital CMOS circuits. In...
In modern superscalar processors, the complex instruction scheduler could form the critical path of ...
This paper explores hardware specialization of low power processors to improve performance and ener...
For the most recent CMOS feature sizes (e.g., 90nm and 65nm), leakage power dissipation has become a...
The evolution of computer systems to continuously improve execution efficiency has traditionally emb...
My thesis explores the effectiveness of software techniques that bend digital abstractions in order ...
The instruction window is a critical component and a major en-ergy consumer in out-of-order supersca...
The issue logic of a dynamically-scheduled superscalar processor is a complex mechanism devoted to s...
Many programs exhibit application level error resilience which allows certain subcomputations to exe...
Abstract. Dynamic instruction scheduling logic is one of the most critical components of modern supe...
CMOS technology scaling improves the speed and functionality of microprocessors by reducing the siz...
Energy efficiency is increasingly important with wider use of batterypowered devices. There are man...
While the central window implementation in a superscalar processor is an effective approach to wakin...
The information and communication technology (ICT) sector is consuming an increasing proportion of g...
New low power solutions for Very Large Scale Integration (VLSI) are proposed. Especially, we focus o...
Power gating is a technique commonly used for runtime leakage reduction in digital CMOS circuits. In...
In modern superscalar processors, the complex instruction scheduler could form the critical path of ...
This paper explores hardware specialization of low power processors to improve performance and ener...
For the most recent CMOS feature sizes (e.g., 90nm and 65nm), leakage power dissipation has become a...
The evolution of computer systems to continuously improve execution efficiency has traditionally emb...
My thesis explores the effectiveness of software techniques that bend digital abstractions in order ...