Energy-Efficient Hybrid Wakeup Logic

The instruction window is a critical component and a major en-ergy consumer in out-of-order superscalar processors. An impor-tant source of energy consumption in the instruction window is the instruction wakeup: a completing instruction broadcasts its result register tag and an associative comparison is performed with all the entries in the window. This paper shows that a very large fraction of the completing instructions have to wake up no more than a single instruction cur-rently in the window. Consequently, we propose to save energy by using indexing to only enable the comparator at the single in-struction to wake up. Only in the rare case when more than one instruction needs to wake up, our scheme reverts to enabling all the comparators or a subset of them. For this reason, we call our scheme Hybrid. Overall, our scheme is very effective: for a proces-sor with a 96-entry window, the number of comparisons performed by the average completing instruction with a destination register is reduced to 0.8. The exact magnitude of the energy savings will depend on the specific instruction window implementation. Fur-thermore, the application suffers no performance penalty