International audienceSoftware-controlled local memories (LMs) are widely used to provide fast, scalable, power efficient and predictable access to critical data. While many studies addressed LM management, keeping hot data in the LM continues to cause major headache. This paper revisits LM management of arrays in light of recent progresses in register allocation, supporting multiple live-range splitting schemes through a generic integer linear program. These schemes differ in the grain of decision points. The model can also be extended to address fragmentation, assigning live ranges to precise offsets. We show that the links between LM management and register allocation have been underexploited, leaving much fundamental questions open and ...
Register allocation is an essential optimization for all compilers. A number of sophisticated regist...
The bandwidth mismatch between processor and main memory is one major limiting problem. Although str...
Abstract. Commonly-used memory units enable a processor to load and store multiple registers in one ...
International audienceSoftware-controlled local memories (LMs) are widely used to provide fast, scal...
Software-controlled local memories (LMs) are widely used to provide fast, scalable, power efficient ...
In compilation, register allocation is the optimization that chooses which vari-ables of the source ...
International audienceIn today's embedded systems, memory hierarchy is rapidly becoming a major fact...
Embedded systems executing specialized programs have been increasingly responsible for a large share...
Compilers use software-controlled local memories to provide fast, predictable, and power-efficient a...
Abstract—Limited Local Memory (LLM) architectures are power-efficient, scalable memory multi-core ar...
Limited Local Memory (LLM) architectures are popular scalable memory multi-core architectures in whi...
We study the problem of local register allocation (LRA): assign pseudo-registers to actual registers...
Despite the benefit of the memory hierarchy, it is still essential, in order to reduce accesses to h...
(eng) We investigate the technique of storing multiple array elements in the same memory cell, with ...
Abstract. Local register allocation (LRA) assigns pseudo-registers to actual registers in a basic bl...
Register allocation is an essential optimization for all compilers. A number of sophisticated regist...
The bandwidth mismatch between processor and main memory is one major limiting problem. Although str...
Abstract. Commonly-used memory units enable a processor to load and store multiple registers in one ...
International audienceSoftware-controlled local memories (LMs) are widely used to provide fast, scal...
Software-controlled local memories (LMs) are widely used to provide fast, scalable, power efficient ...
In compilation, register allocation is the optimization that chooses which vari-ables of the source ...
International audienceIn today's embedded systems, memory hierarchy is rapidly becoming a major fact...
Embedded systems executing specialized programs have been increasingly responsible for a large share...
Compilers use software-controlled local memories to provide fast, predictable, and power-efficient a...
Abstract—Limited Local Memory (LLM) architectures are power-efficient, scalable memory multi-core ar...
Limited Local Memory (LLM) architectures are popular scalable memory multi-core architectures in whi...
We study the problem of local register allocation (LRA): assign pseudo-registers to actual registers...
Despite the benefit of the memory hierarchy, it is still essential, in order to reduce accesses to h...
(eng) We investigate the technique of storing multiple array elements in the same memory cell, with ...
Abstract. Local register allocation (LRA) assigns pseudo-registers to actual registers in a basic bl...
Register allocation is an essential optimization for all compilers. A number of sophisticated regist...
The bandwidth mismatch between processor and main memory is one major limiting problem. Although str...
Abstract. Commonly-used memory units enable a processor to load and store multiple registers in one ...