Embedded systems executing specialized programs have been increasingly responsible for a large share of the computer systems manufactured every year. This trend has increased the demand for processors that can guarantee high-performance under stringent cost, power, and code size constraints. Indirect addressing is by far the most used addressing mode in programs running on these systems, since it enables the design of small and faster instructions. This paper proposes a solution to the problem of allocating registers to array references using auto-increment addressing modes. It extends previous work in the area by enabling efficient allocation in the presence of control-flow statements. The solution is based on an algorithm that merges addr...
International audienceSoftware-controlled local memories (LMs) are widely used to provide fast, scal...
The aggressive application of scalar replacement to ar-ray references substantially reduces the numb...
DSP architectures typically provide dedicated memory address generation units and indirect addressin...
Ecient address register allocation has been shown to be a central problem in code generation for pr...
Abstract—Many application-specific architectures provide indirect addressing modes with auto-increme...
Many embedded architectures provide indirect addressing modes with autoincrement /decrement arithmet...
Since most DSP applications access large amount of data stored in the memory, a DSP code generator m...
An increasing number of components in embedded systems are implemented by software running on embe...
This paper presents a new approach to solving the DSP address assignment problem. A minimum cost cir...
The time spent on register allocation must be reasonable compared to other global optimizations in a...
This paper presents DSP code optimization techniques, which originate from dedicated memory address ...
Submitted on behalf of EDAA (http://www.edaa.com/)International audienceThe aggressive application o...
DSPs are typically equipped with indirect addressing modes with auto-increment and auto-decrement, w...
This paper presents a new approach to solving the DSP address code generation problem. A minimum cos...
The performance of the memory hierarchy has become one of the most critical elements in the performa...
International audienceSoftware-controlled local memories (LMs) are widely used to provide fast, scal...
The aggressive application of scalar replacement to ar-ray references substantially reduces the numb...
DSP architectures typically provide dedicated memory address generation units and indirect addressin...
Ecient address register allocation has been shown to be a central problem in code generation for pr...
Abstract—Many application-specific architectures provide indirect addressing modes with auto-increme...
Many embedded architectures provide indirect addressing modes with autoincrement /decrement arithmet...
Since most DSP applications access large amount of data stored in the memory, a DSP code generator m...
An increasing number of components in embedded systems are implemented by software running on embe...
This paper presents a new approach to solving the DSP address assignment problem. A minimum cost cir...
The time spent on register allocation must be reasonable compared to other global optimizations in a...
This paper presents DSP code optimization techniques, which originate from dedicated memory address ...
Submitted on behalf of EDAA (http://www.edaa.com/)International audienceThe aggressive application o...
DSPs are typically equipped with indirect addressing modes with auto-increment and auto-decrement, w...
This paper presents a new approach to solving the DSP address code generation problem. A minimum cos...
The performance of the memory hierarchy has become one of the most critical elements in the performa...
International audienceSoftware-controlled local memories (LMs) are widely used to provide fast, scal...
The aggressive application of scalar replacement to ar-ray references substantially reduces the numb...
DSP architectures typically provide dedicated memory address generation units and indirect addressin...