This paper presents a new approach to solving the DSP address assignment problem. A minimum cost circulation approach is used to efficiently generate high performance addressing code in polynomial time. Addressing code size improvements of up to 7 times are obtained, accounting for up to 1.6 times improvement in code size and performance of compiler-generated DSP code. Results also show that memory layout has a small effect on code size and perfor-mance when optimal addressing is used. This research is important for industry since this value-added technique can improve code size, power dissipation and performance, without increasing cost. 1
Digital signal processors provide dedicated address generation units (AGUs) that are capable of perf...
Reducing address arithmetic operations by optimization of address offset assignment greatly improves...
A number of different algorithms for optimized offset assignment in DSP code generation have been de...
This paper presents a new approach to solving the DSP address code generation problem. A minimum cos...
This paper presents DSP code optimization techniques, which originate from dedicated memory address ...
Since most DSP applications access large amount of data stored in the memory, a DSP code generator m...
This paper presents a model for simultaneous instruction selection, compaction, and register allocat...
DSP architectures typically provide dedicated memory address generation units and indirect addressin...
One important part of generating code for DSP processors is to make good use of the address generati...
International audienceIn digital signal processors (DSPs), variables are accessed using k address re...
Recent work on compilation for DSP-processors deals with optimizing access to local variables of fun...
Many embedded architectures provide indirect addressing modes with autoincrement /decrement arithmet...
Abstract—Many application-specific architectures provide indirect addressing modes with auto-increme...
DSPs are typically equipped with indirect addressing modes with auto-increment and auto-decrement, w...
An increasing number of components in embedded systems are implemented by software running on embe...
Digital signal processors provide dedicated address generation units (AGUs) that are capable of perf...
Reducing address arithmetic operations by optimization of address offset assignment greatly improves...
A number of different algorithms for optimized offset assignment in DSP code generation have been de...
This paper presents a new approach to solving the DSP address code generation problem. A minimum cos...
This paper presents DSP code optimization techniques, which originate from dedicated memory address ...
Since most DSP applications access large amount of data stored in the memory, a DSP code generator m...
This paper presents a model for simultaneous instruction selection, compaction, and register allocat...
DSP architectures typically provide dedicated memory address generation units and indirect addressin...
One important part of generating code for DSP processors is to make good use of the address generati...
International audienceIn digital signal processors (DSPs), variables are accessed using k address re...
Recent work on compilation for DSP-processors deals with optimizing access to local variables of fun...
Many embedded architectures provide indirect addressing modes with autoincrement /decrement arithmet...
Abstract—Many application-specific architectures provide indirect addressing modes with auto-increme...
DSPs are typically equipped with indirect addressing modes with auto-increment and auto-decrement, w...
An increasing number of components in embedded systems are implemented by software running on embe...
Digital signal processors provide dedicated address generation units (AGUs) that are capable of perf...
Reducing address arithmetic operations by optimization of address offset assignment greatly improves...
A number of different algorithms for optimized offset assignment in DSP code generation have been de...