Software-based Transparent And Comprehensive Control-flow Error Detection

Shrinking microprocessor feature size and growing transistor density may increase the soft-error rates to unacceptable levels in the near future. While reliable systems typically employ hardware techniques to address soft-errors, software-based techniques can provide a less expensive and more flexible alternative. This paper presents a control-flow error classification and proposes two new software-based comprehensive control-flow error detection techniques. The new techniques are better than the previous ones in the sense that they detect errors in all the branch-error categories. We implemented the techniques in our dynamic binary translator so that the techniques can be applied to existing x86 binaries transparently. We compared our new techniques with the previous ones and we show that our methods cover more errors while has similar performance overhead. © 2006 IEEE.333345Alkhalifa, Z., Nair, V.S.S., Krishnamurthy, N., Abraham, J.A., Design and evaluation of system-level checks for on-line control-flow error detection (1999) IEEE Trans. Parallel Distrib. Syst, 10, pp. 627-641. , JuneAndo, H., A 1.3ghz fifth generation sparc64 microprocessors (2003) Proc. IEEE International Solid-State Circuits Conference. (ISSCC 03), pp. 246-247. , IEEE PressBaumann, R., Soft errors in commercial semiconductor technology: Overview and scaling trends (2002) IEEE 2002 Reliability Physics Symp. Tutorial Notes, Reliability Fundamentals, pp. 1210101-1210114. , IEEE PressChandra, S., Chen, P.M., How fail-stop are faulty programs? (1998) Proceedings of the 1998 Symposium on Fault-Tolerant Computing (FTCS), , JuneConstantinescu, C., Trends and challenges in vlsi circuit reliability (2003) IEEE Micro, 23, pp. 14-19. , Jul.-AugIntel@ Extended Memory 64 Technology Software Developer's GuideIA-32 Intel@ Architecture Software Developer's ManualMukherjee, S.S., Emer, J., Reinhardt, S.K., The soft error problem: An architectural perspective (2005) Proceeding of the 11th Int'l Symposium on High- Performance Computer Architecture (HPCA-11), pp. 243-247. , 12-16 FebMichel, T., Leveugle, R., Saucier, G., A new approach to control-flow checking without program modification (1991) Proc. FTCS-21, pp. 334-341Namjoo, M., CERBERUS-16: An architecture for a general purpose watchdog processor (1983) Proc. Symposium on Fault-Tolerant Computing, pp. 216-219O'Gorman, T.J., Ross, J.M., Taber, A.H., Ziegler, J.F., Muhlfeld, H.P., Montrose, I.C.J., Curtis, H.W., Walsh, J.L., Field testing for cosmic ray soft errors in semiconductor memories (1996) IBM Journal of Research and Development, pp. 41-49. , JanuaryOh, N., Shirvani, P.P., McCluskey, E.J., Controlflow checking by software signatures (2002) IEEE Transactions on Reliability, 51 (2), pp. 111-122. , MarchReis, G.A., Chang, J., Vachharajani, N., Rangan, R., August, D.I., SWIFT: Software implemented fault tolerance (2005) Proceedings of the Third International Symposium on Code Generation and Optimization (CGO), , MarchShivakumar, P., Kistler, M., Keckler, S.W., Burger, D., Alvisi, L., Modeling the effect of technology trends on the soft error rate of combinational logic (2002) Proceedings of the 2002 International Conference on Dependable Systems and Networks, pp. 389-399. , JuneSaxena, N.R., McCluskey, E.J., Control-flow checking using watchdog assists and extended-precision checksums (1990) IEEE Transactions on Computers, 39 (4), pp. 554-559. , Ap