In this paper, a software behavior-based technique is presented to detect control-flow errors in multi-core architectures. The analysis of a key point leads to introduce the proposed technique: employing under-utilized CPU resources in multi-core processors to check the execution flow of the programs concurrently and in parallel with the main executions. To evaluate the proposed technique, a quad-core processor system was used as the simulation environment, and the behavior of SPEC CPU2006 benchmarks were studied as the target to compare with conventional techniques. The experimental results, with regard to both detection coverage and performance overhead, demonstrate that on average about 94% of the control-flow errors can be detected by t...
The scaling of Silicon devices has exacerbated the unreliability of modern computer systems, and pow...
With the advent of multicores, there is demand for monitoring parallelprograms running on multicores...
Hybrid error-detection techniques combine software techniques with an external hardware module that ...
This paper presents two control-flow error recovery techniques, CFE Recovery using Data-flow graph C...
The improvement of dependability in computing systems requires the evaluation of fault tolerance mec...
Shrinking microprocessor feature size and growing transistor density may increase the soft-error rat...
There is broad consensus among academic and industrial researchers in computer architecture that har...
Software-based fault tolerance techniques are a low-cost way to protect processors against soft erro...
Microprocessor error detection is increasingly important, as the number of transistors in modern sys...
Microprocessors in safety-critical system are extremely vulnerable to hacker attacks and circuit cro...
Parallelism is ubiquitous in modern computer architectures. Heterogeneity of CPU cores and deep memo...
This thesis addresses three important steps in the selection of error detection mechanisms for micro...
The control flow checking technique presented in our paper is based on the new watchdog- proc...
This work presents a new Dual-Core LockStep approach to enhance fault tolerance in microprocessors. ...
Commercial multicore central processing units (CPU) integrate a number of processor cores on a singl...
The scaling of Silicon devices has exacerbated the unreliability of modern computer systems, and pow...
With the advent of multicores, there is demand for monitoring parallelprograms running on multicores...
Hybrid error-detection techniques combine software techniques with an external hardware module that ...
This paper presents two control-flow error recovery techniques, CFE Recovery using Data-flow graph C...
The improvement of dependability in computing systems requires the evaluation of fault tolerance mec...
Shrinking microprocessor feature size and growing transistor density may increase the soft-error rat...
There is broad consensus among academic and industrial researchers in computer architecture that har...
Software-based fault tolerance techniques are a low-cost way to protect processors against soft erro...
Microprocessor error detection is increasingly important, as the number of transistors in modern sys...
Microprocessors in safety-critical system are extremely vulnerable to hacker attacks and circuit cro...
Parallelism is ubiquitous in modern computer architectures. Heterogeneity of CPU cores and deep memo...
This thesis addresses three important steps in the selection of error detection mechanisms for micro...
The control flow checking technique presented in our paper is based on the new watchdog- proc...
This work presents a new Dual-Core LockStep approach to enhance fault tolerance in microprocessors. ...
Commercial multicore central processing units (CPU) integrate a number of processor cores on a singl...
The scaling of Silicon devices has exacerbated the unreliability of modern computer systems, and pow...
With the advent of multicores, there is demand for monitoring parallelprograms running on multicores...
Hybrid error-detection techniques combine software techniques with an external hardware module that ...