A Hardware Algorithm for Variable-Precision Logarithm

This paper presents an e cient hardware algorithm for variable-precision logarithm. The algorithm uses an iterative te chnique that employs table l okups and polynomial approximations. Compared to similar algorithms, it reduces the number of xed-pr ecision op erations by avoiding full precision computations and dynamically varying the precision of intermediate results. It also uses signi cantly smaller tables than relate d algorithms. For a speci ed hardware implementation, the algorithm requir es fewer than2L2 xe d-pr ecision multiplications to evaluate the logarithm to L words of precision. An error analysis for the algorithm is also presente d. 1