A Fast Hardware Approach for Approximate, Efficient Logarithm and Antilogarithm Computations

Abstract—The realization of functions such as log() and antilog() in hardware is of considerable relevance, due to their importance in several computing applications. In this paper, we present an ap-proach to compute log() and antilog() in hardware. Our approach is based on a table lookup, followed by an interpolation step. The interpolation step is implemented in combinational logic, in a field-programmable gate array (FPGA), resulting in an area-efficient, fast design. The novelty of our approach lies in the fact that we perform interpolation efficiently, without the need to perform mul-tiplication or division, and our method performs both the log() and antilog() operation using the same hardware architecture. We com-pare our work with existing methods, and show that our approach results in significantly lower memory resource utilization, for the same approximation errors. Also our method scales very well with an increase in the required accuracy, compared to existing tech-niques. Index Terms—Field-programmable gate arrays (FPGAs), floating point arithmetic, logarithmic arithmetic, VLSI. I