Energy-efficient microprocessor designs are one of the major concerns in both high performance and embedded processor domains. Furthermore, as process technology advances toward deep submicron, static power dissipation becomes a new challenge to address, especially for large on-chip array structures such as caches or prediction tables. Value prediction emerged in the recent past as a very effective way of increasing processor performance by overcoming data dependences. The more accurate the value predictor is the more performance is obtained, at the expense of becoming a source of power consumption and a thermal hot spot, and therefore increasing its leakage. Recent techniques, aimed at reducing the leakage power of array structures such as...
fraction of the total power consumption of microprocessors. In nanometer-scale technology, the subth...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
This paper describes a new on-demand wakeup prediction policy for instruction cache leakage control ...
Energy-efficient microprocessor designs are one of the major concerns in both high performance and e...
Energy-efficient microprocessor designs are one of the major concerns in both high performance and e...
submicron (below 90nm), static power becomes a new challenge to address for energy-efficient high pe...
Power dissipation is increasingly important in CPUs rang-ing from those intended for mobile use, all...
Decreasing power consumption in small devices such as handhelds, cell phones and high-performance pr...
Abstract—Reducing the supply voltage to reduce dynamic power consumption in CMOS devices, inadverten...
Leakage power is becoming dominant part of the micro-processor chip power budget as feature size shr...
As the transistor feature sizes and threshold voltages reduce, leakage energy consumption has become...
Scaling of CMOS technology has enabled a phenomenal growth in computing capability throughout the la...
Following Moore’s Law, technology scaling will continue providing integration capacityof billions of...
We present Value Prediction for Security (VPsec), a novel hardware-only framework to counter fault a...
To improve application performance, current processors rely on prediction-based hardware optimizatio...
fraction of the total power consumption of microprocessors. In nanometer-scale technology, the subth...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
This paper describes a new on-demand wakeup prediction policy for instruction cache leakage control ...
Energy-efficient microprocessor designs are one of the major concerns in both high performance and e...
Energy-efficient microprocessor designs are one of the major concerns in both high performance and e...
submicron (below 90nm), static power becomes a new challenge to address for energy-efficient high pe...
Power dissipation is increasingly important in CPUs rang-ing from those intended for mobile use, all...
Decreasing power consumption in small devices such as handhelds, cell phones and high-performance pr...
Abstract—Reducing the supply voltage to reduce dynamic power consumption in CMOS devices, inadverten...
Leakage power is becoming dominant part of the micro-processor chip power budget as feature size shr...
As the transistor feature sizes and threshold voltages reduce, leakage energy consumption has become...
Scaling of CMOS technology has enabled a phenomenal growth in computing capability throughout the la...
Following Moore’s Law, technology scaling will continue providing integration capacityof billions of...
We present Value Prediction for Security (VPsec), a novel hardware-only framework to counter fault a...
To improve application performance, current processors rely on prediction-based hardware optimizatio...
fraction of the total power consumption of microprocessors. In nanometer-scale technology, the subth...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
This paper describes a new on-demand wakeup prediction policy for instruction cache leakage control ...