Add to ORKGLeakage power in data cache memories represents a sizable fraction of total power consumption, and many techniques have been proposed to reduce it. Previous techniques put unused lines for example to drowsy state or switch them off completely (cache decay) in order to save power. Our idea is to adaptively select mostly used cache lines. We found that this can be achieved automatically by using a tiny cache acting as a filter L0 cache. Our experiments, with complete MiBench suite for ARM based processor, show 13\% improvement in leakage saving and 21\% in EDP versus drowsy cache and 52\% improvement in leakage saving and 65\% in EDP versus cache decay (in average)
Power consumption is becoming an increasingly important component of processor design. As technology...
As technology scales down at an exponential rate, leakage power is fast becoming the dominant compon...
Cool Chips X : the 10th anniversary of IEEE Symposium on Low-Power and High-Speed Chips : April 18-2...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
Leakage power in cache memories represents a sizable fraction of total power consumption, and many t...
Power dissipation is increasingly important in CPUs rang-ing from those intended for mobile use, all...
We evaluate the leakage reduction for both instruction and data cache in presence of drowsy or decay...
Abstract—Reducing the supply voltage to reduce dynamic power consumption in CMOS devices, inadverten...
Technology projections indicate that static power will become a major concern in future generations ...
Leakage power is becoming dominant part of the micro-processor chip power budget as feature size shr...
As the transistor feature sizes and threshold voltages reduce, leakage energy consumption has become...
As the transistor feature sizes and threshold voltages reduce, leakage energy consumption has become...
If current technology scaling trends hold, leakage power dissipation will soon become the dominant s...
Power consumption is becoming an increasingly important component of processor design. As technology...
As technology scales down at an exponential rate, leakage power is fast becoming the dominant compon...
Cool Chips X : the 10th anniversary of IEEE Symposium on Low-Power and High-Speed Chips : April 18-2...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
Leakage power in cache memories represents a sizable fraction of total power consumption, and many t...
Power dissipation is increasingly important in CPUs rang-ing from those intended for mobile use, all...
We evaluate the leakage reduction for both instruction and data cache in presence of drowsy or decay...
Abstract—Reducing the supply voltage to reduce dynamic power consumption in CMOS devices, inadverten...
Technology projections indicate that static power will become a major concern in future generations ...
Leakage power is becoming dominant part of the micro-processor chip power budget as feature size shr...
As the transistor feature sizes and threshold voltages reduce, leakage energy consumption has become...
As the transistor feature sizes and threshold voltages reduce, leakage energy consumption has become...
If current technology scaling trends hold, leakage power dissipation will soon become the dominant s...
Power consumption is becoming an increasingly important component of processor design. As technology...
As technology scales down at an exponential rate, leakage power is fast becoming the dominant compon...
Cool Chips X : the 10th anniversary of IEEE Symposium on Low-Power and High-Speed Chips : April 18-2...