In resource-constrained real-time embedded systems, scratchpad memory (SPM) is utilized in place of cache to increase performance and enforce consistent behavior of both hard and soft real-time tasks via software-controlled SPM management techniques (SPMMTs). Real-time systems depend on time critical (hard) tasks to complete execution before their deadline times. Many real-time systems also depend on the execution of soft tasks that do not have to complete by hard deadlines. This thesis evaluates a new SPMMT that increases both worst-case task slack time (TST) and soft task processing capabilities, by combining two existing SPMMTs. The schedulability-driven ACETRB / WCETRB swapping (SDAWS) SPMMT of this thesis uses task schedulability cha...
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads...
As time predictability is critical to hard real-time systems, it is not only necessary to accurately...
Many real-time (RT) embedded systems can ben-efit from a memory hierarchy to bridge the proces-sor/m...
In resource-constrained real-time embedded systems, scratchpad memory (SPM) is utilized in place of...
abstract: Cyber-physical systems and hard real-time systems have strict timing constraints that spec...
To improve the execution time of a program, parts of its instructions can be allocated to a fast Scr...
ScratchPad Memory (SPM) is highly adopted in real-time systems as it exhibits a predictable behaviou...
This paper shows that a program using a time-predictable memory system for data storage can achieve ...
Embedded/Cyber-physical systems, have become popular in a wide range of application scenarios. Su...
Schedulability-driven scratchpad memory swapping for resource-constrained real-time embedded system
Scratchpad memory is a popular choice for on-chip storage in real-time embedded systems. The allocat...
Abstract—Hardware-managed caches introduce large amounts of timing variability, complicating real-ti...
Over the past years, multicore systems emerged into the domain of hard real-time systems. These syst...
Scratchpads have been widely proposed as an alternative to caches for embedded systems. Advantages o...
Multicore systems will continue to spread in the domain of real-time embedded systems due to the inc...
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads...
As time predictability is critical to hard real-time systems, it is not only necessary to accurately...
Many real-time (RT) embedded systems can ben-efit from a memory hierarchy to bridge the proces-sor/m...
In resource-constrained real-time embedded systems, scratchpad memory (SPM) is utilized in place of...
abstract: Cyber-physical systems and hard real-time systems have strict timing constraints that spec...
To improve the execution time of a program, parts of its instructions can be allocated to a fast Scr...
ScratchPad Memory (SPM) is highly adopted in real-time systems as it exhibits a predictable behaviou...
This paper shows that a program using a time-predictable memory system for data storage can achieve ...
Embedded/Cyber-physical systems, have become popular in a wide range of application scenarios. Su...
Schedulability-driven scratchpad memory swapping for resource-constrained real-time embedded system
Scratchpad memory is a popular choice for on-chip storage in real-time embedded systems. The allocat...
Abstract—Hardware-managed caches introduce large amounts of timing variability, complicating real-ti...
Over the past years, multicore systems emerged into the domain of hard real-time systems. These syst...
Scratchpads have been widely proposed as an alternative to caches for embedded systems. Advantages o...
Multicore systems will continue to spread in the domain of real-time embedded systems due to the inc...
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads...
As time predictability is critical to hard real-time systems, it is not only necessary to accurately...
Many real-time (RT) embedded systems can ben-efit from a memory hierarchy to bridge the proces-sor/m...