The predictability of memory access patterns in embedded systems can be successfully exploited to devise effective application-specific cache optimizations. In this paper, an improved indexing scheme for direct-mapped caches, which drastically reduces the number of conflict misses by using application-specific information, is proposed. The indexing scheme is based on the selection of a subset of the address bits. With respect to similar approaches, the solution has two main strengths. First, owing to an analytical model for the conflict-miss conditions of a given trace, it provides a symbolic algorithm to compute the optimum solution (i.e., the subset of address bits to be used as cache index that minimize the number of conflict misses). Se...
Directly mapped caches are an attractive option for processor designers as they combine fast lookup ...
Applications with regular patterns of memory access can experience high levels of cache conflict mis...
In the embedded domain, the gap between memory and processor performance and the increase in applica...
The predictability of memory access patterns in embedded systems can be successfully exploited to de...
The increasing use of microprocessor cores in embedded systems as well as mobile and portable device...
This paper describes a method for improving the performance of a large direct-mapped cache by reduci...
In embedded systems caches are very precious for keeping low the memory bandwidth and to allow emplo...
The memory system is often the weakest link in the performance of today’s computers. Cache design ha...
Nearly all modern computing systems employ caches to hide the memory latency. Modern processors ofte...
This paper proposes an optimization by an alternative approach to memory mapping. Caches with low se...
In computer systems with large, physically-indexed, direct-mapped caches, a poor mapping from virtua...
Prior knowledge of the target application leads to new optimization and customization opportunities ...
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip ...
Cache memory is a bridging component which covers the increasing gap between the speed of a processo...
Caches were designed to amortize the cost of memory accesses by moving copies of frequently accessed...
Directly mapped caches are an attractive option for processor designers as they combine fast lookup ...
Applications with regular patterns of memory access can experience high levels of cache conflict mis...
In the embedded domain, the gap between memory and processor performance and the increase in applica...
The predictability of memory access patterns in embedded systems can be successfully exploited to de...
The increasing use of microprocessor cores in embedded systems as well as mobile and portable device...
This paper describes a method for improving the performance of a large direct-mapped cache by reduci...
In embedded systems caches are very precious for keeping low the memory bandwidth and to allow emplo...
The memory system is often the weakest link in the performance of today’s computers. Cache design ha...
Nearly all modern computing systems employ caches to hide the memory latency. Modern processors ofte...
This paper proposes an optimization by an alternative approach to memory mapping. Caches with low se...
In computer systems with large, physically-indexed, direct-mapped caches, a poor mapping from virtua...
Prior knowledge of the target application leads to new optimization and customization opportunities ...
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip ...
Cache memory is a bridging component which covers the increasing gap between the speed of a processo...
Caches were designed to amortize the cost of memory accesses by moving copies of frequently accessed...
Directly mapped caches are an attractive option for processor designers as they combine fast lookup ...
Applications with regular patterns of memory access can experience high levels of cache conflict mis...
In the embedded domain, the gap between memory and processor performance and the increase in applica...