This paper describes a method for improving the performance of a large direct-mapped cache by reducing the number of conflict misses. Our solution consists of two components: an inexpensive hardware device called a Cache Miss Lookaside (CML) buffer that detects conflicts by recording and summarizing a history of cache misses, and a software policy within the operating system's virtual memory system that removes conflicts by dynamically remapping pages whenever large numbers of conflict misses are detected. Using trace-driven simulation of applications and the operating system, we show that a CML buffer enables a large direct-mapped cache to perform nearly as well as a two-way set associative cache of equivalent size and speed, although...
Several schemes have been proposed that incorporate an auxiliary buffer to improve the performance o...
Directly mapped caches are an attractive option for processor designers as they combine fast lookup ...
In embedded systems caches are very precious for keeping low the memory bandwidth and to allow emplo...
In computer systems with large, physically-indexed, direct-mapped caches, a poor mapping from virtua...
The memory system is often the weakest link in the performance of today’s computers. Cache design ha...
Nearly all modern computing systems employ caches to hide the memory latency. Modern processors ofte...
The predictability of memory access patterns in embedded systems can be successfully exploited to de...
Limited set-associativity in hardware caches can cause conflict misses when multiple data items map ...
Limited set-associativity in hardware caches can cause conflict misses when multiple data items map ...
Caches were designed to amortize the cost of memory accesses by moving copies of frequently accessed...
Projections of computer technology forecast proces-sors with peak performance of 1,000 MIPS in the r...
This paper proposes an optimization by an alternative approach to memory mapping. Caches with low se...
Directly mapped caches are an attractive option for processor designers as they combine fast lookup ...
Cache conflict misses can cause severe degradation in application performance. Previous research has...
Memory (cache, DRAM, and disk) is in charge of providing data and instructions to a computer\u27s pr...
Several schemes have been proposed that incorporate an auxiliary buffer to improve the performance o...
Directly mapped caches are an attractive option for processor designers as they combine fast lookup ...
In embedded systems caches are very precious for keeping low the memory bandwidth and to allow emplo...
In computer systems with large, physically-indexed, direct-mapped caches, a poor mapping from virtua...
The memory system is often the weakest link in the performance of today’s computers. Cache design ha...
Nearly all modern computing systems employ caches to hide the memory latency. Modern processors ofte...
The predictability of memory access patterns in embedded systems can be successfully exploited to de...
Limited set-associativity in hardware caches can cause conflict misses when multiple data items map ...
Limited set-associativity in hardware caches can cause conflict misses when multiple data items map ...
Caches were designed to amortize the cost of memory accesses by moving copies of frequently accessed...
Projections of computer technology forecast proces-sors with peak performance of 1,000 MIPS in the r...
This paper proposes an optimization by an alternative approach to memory mapping. Caches with low se...
Directly mapped caches are an attractive option for processor designers as they combine fast lookup ...
Cache conflict misses can cause severe degradation in application performance. Previous research has...
Memory (cache, DRAM, and disk) is in charge of providing data and instructions to a computer\u27s pr...
Several schemes have been proposed that incorporate an auxiliary buffer to improve the performance o...
Directly mapped caches are an attractive option for processor designers as they combine fast lookup ...
In embedded systems caches are very precious for keeping low the memory bandwidth and to allow emplo...