sign Aids—automatic synthesis, optimization General Terms

MiniBit, our automated approach for optimizing bit-widths of fixed-point designs is based on static analysis via affine arithmetic. We describe methods to minimize both the in-teger and fraction parts of fixed-point signals with the aim of minimizing circuit area. Our range analysis technique identifies the number of integer bits required. For precision analysis, we employ a semi-analytical approach with ana-lytical error models in conjunction with adaptive simulated annealing to find the optimum number of fraction bits. Im-provements for a given design reduce area and latency by up to 20 % and 12 % respectively, over optimum uniform fraction bit-widths on a Xilinx Virtex-4 FPGA