Least-Significant Bit Optimization Techniques for

Abstract — In this paper we present a methodology for FPGA datapath precision optimization subject to user-defined area and error constraints. This work builds upon our previous research [1] which presented a methodology for optimizing for dynamic range—the most significant bit position. In this work, we derive area and error models of a general island-style FPGA architecture in order to optimize the least-significant bit position of circuit datapaths. We present some preliminary results describing the effectiveness of our techniques on typical signal and image processing kernels. I