Mesh traversal is a common and essential geometry processing problem in computer graphics. The traversal typically processes each face in a mesh in a systematic and consistent order for different applications such as mesh compression, rendering, curvature tracing, mesh simplification and surface smoothing. While cache-efficient mesh traversal methods where data and computations are reordered for good cache reuse have been well-studied, their run-time performances are limited by implicit(automatic) memory management. In this work we explore explicit optimizations on Explicitly Managed Memory (EMM) systems. Unlike conventional processors, EMM hardware has no automatic caching or prefetching. Instead, programmers decide what, when and where d...
Abstract—Increasingly, the main bottleneck limiting performance on emerging multi-core and many-core...
Recent advances in graphics architecture focus on improving texture performance and pixel processing...
International audienceWe present an e cient runtime cache to accelerate the display of procedurally ...
Applications that operate on meshes are very popular in High Performance Computing (HPC) environment...
We present a novel method for computing cache-oblivious layouts of large meshes that improve the per...
Bus traffic between the graphics subsystem and memory can become a bottleneck when rendering geometr...
One important bottleneck when visualizing large data sets is the data transfer between processor and...
The new generation of commodity graphics cards with significant on-board video memory has become wid...
Many real-life applications of processor-arrays suffer from memory bandwidth limitations. In many ca...
We present an efficient runtime cache to accelerate the display of procedurally displaced and textur...
The new generation of commodity graphics cards with significant on-board video memory has become wid...
In this paper we describe an algorithm to speed up the rendering of triangulated meshes. The gap bet...
"What Mathematics is to Physics, Data traversal is to High-performance computing." The world of Comp...
Over the past decades, core speeds have been improving at a much higher rate than memory bandwidth. ...
Given an arbitrary viewpoint v and a terrain, the visibility map or viewshed of v is the set of poin...
Abstract—Increasingly, the main bottleneck limiting performance on emerging multi-core and many-core...
Recent advances in graphics architecture focus on improving texture performance and pixel processing...
International audienceWe present an e cient runtime cache to accelerate the display of procedurally ...
Applications that operate on meshes are very popular in High Performance Computing (HPC) environment...
We present a novel method for computing cache-oblivious layouts of large meshes that improve the per...
Bus traffic between the graphics subsystem and memory can become a bottleneck when rendering geometr...
One important bottleneck when visualizing large data sets is the data transfer between processor and...
The new generation of commodity graphics cards with significant on-board video memory has become wid...
Many real-life applications of processor-arrays suffer from memory bandwidth limitations. In many ca...
We present an efficient runtime cache to accelerate the display of procedurally displaced and textur...
The new generation of commodity graphics cards with significant on-board video memory has become wid...
In this paper we describe an algorithm to speed up the rendering of triangulated meshes. The gap bet...
"What Mathematics is to Physics, Data traversal is to High-performance computing." The world of Comp...
Over the past decades, core speeds have been improving at a much higher rate than memory bandwidth. ...
Given an arbitrary viewpoint v and a terrain, the visibility map or viewshed of v is the set of poin...
Abstract—Increasingly, the main bottleneck limiting performance on emerging multi-core and many-core...
Recent advances in graphics architecture focus on improving texture performance and pixel processing...
International audienceWe present an e cient runtime cache to accelerate the display of procedurally ...