Leveraging the power of scratchpad memories (SPMs) available in most embedded systems today is crucial to extract maximum performance from application programs. While regular accesses like scalar values and array expressions with affine subscript functions have been tractable for compiler analysis (to be prefetched into SPM), irregular accesses like pointer accesses and indexed array accesses have not been easily amenable for compiler analysis. This paper presents an SPM management technique using Markov chain based data access prediction for such irregular accesses. Our approach takes advantage of inherent, but hidden reuse in data accesses made by irregular references. We have implemented our proposed approach using an optimizing compiler...
Abstract—We propose a code scratchpad memory (SPM) management technique with demand paging for embed...
This paper presents the first memory allocation scheme for embedded systems having a scratch-pad mem...
abstract: Cyber-physical systems and hard real-time systems have strict timing constraints that spec...
Abstract — Leveraging the power of scratchpad memories (SPMs) available in most embedded systems tod...
Many embedded array-intensive applications have irregular access patterns that are not amenable to s...
Scratchpads have been widely proposed as an alternative to caches for embedded systems. Advantages o...
Using Machine Learning to yield Scalable Program Analyses Program Analysis tackles the problem of p...
In recent years, the real-time community has produced a variety of approaches targeted at managing o...
Abstract—Exploiting runtime memory access traces can be a complementary approach to compiler optimiz...
Scratch-pad memory (SPM), a fast on-chip SRAM managed by software, is widely used in embedded system...
This is the peer reviewed version of the following article: Andrade, D. , Arenaz, M. , Fraguela, B. ...
An important technique for alleviating the memory bottleneck is data prefetching. Data prefetching ...
The design of future high-performance embedded systems is hampered by two problems: First, the requi...
Abstract—An effectively designed and efficiently used memory hierarchy, composed of scratch-pads or ...
To improve the execution time of a program, parts of its instructions can be allocated to a fast Scr...
Abstract—We propose a code scratchpad memory (SPM) management technique with demand paging for embed...
This paper presents the first memory allocation scheme for embedded systems having a scratch-pad mem...
abstract: Cyber-physical systems and hard real-time systems have strict timing constraints that spec...
Abstract — Leveraging the power of scratchpad memories (SPMs) available in most embedded systems tod...
Many embedded array-intensive applications have irregular access patterns that are not amenable to s...
Scratchpads have been widely proposed as an alternative to caches for embedded systems. Advantages o...
Using Machine Learning to yield Scalable Program Analyses Program Analysis tackles the problem of p...
In recent years, the real-time community has produced a variety of approaches targeted at managing o...
Abstract—Exploiting runtime memory access traces can be a complementary approach to compiler optimiz...
Scratch-pad memory (SPM), a fast on-chip SRAM managed by software, is widely used in embedded system...
This is the peer reviewed version of the following article: Andrade, D. , Arenaz, M. , Fraguela, B. ...
An important technique for alleviating the memory bottleneck is data prefetching. Data prefetching ...
The design of future high-performance embedded systems is hampered by two problems: First, the requi...
Abstract—An effectively designed and efficiently used memory hierarchy, composed of scratch-pads or ...
To improve the execution time of a program, parts of its instructions can be allocated to a fast Scr...
Abstract—We propose a code scratchpad memory (SPM) management technique with demand paging for embed...
This paper presents the first memory allocation scheme for embedded systems having a scratch-pad mem...
abstract: Cyber-physical systems and hard real-time systems have strict timing constraints that spec...