Abstract — Leveraging the power of scratchpad memories (SPMs) available in most embedded systems today is crucial to extract maximum performance from application programs. While regular accesses like scalar values and array expressions with affine subscript functions have been tractable for compiler analysis (to be prefetched into SPM), irregular accesses like pointer accesses and indexed array accesses have not been easily amenable for compiler analysis. This paper presents an SPM management technique using Markov chain based data access prediction for such irregular accesses. Our approach takes advantage of inherent, but hidden reuse in data accesses made by irregular references. We have implemented our proposed approach using an optimizi...
Abstract—An effectively designed and efficiently used memory hierarchy, composed of scratch-pads or ...
Memory management searches for the resources required to store the concurrently alive elements. The ...
As the existing techniques that empower the modern high-performance processors are being refined and...
Leveraging the power of scratchpad memories (SPMs) available in most embedded systems today is cruci...
Many embedded array-intensive applications have irregular access patterns that are not amenable to s...
Abstract—Exploiting runtime memory access traces can be a complementary approach to compiler optimiz...
Scratch-pad memory (SPM), a fast on-chip SRAM managed by software, is widely used in embedded system...
An important technique for alleviating the memory bottleneck is data prefetching. Data prefetching ...
Scratchpads have been widely proposed as an alternative to caches for embedded systems. Advantages o...
Modern operating systems use main memory as a cache over disk-based storage. The time spent waiting ...
The design of future high-performance embedded systems is hampered by two problems: First, the requi...
Efficient data supply to the processor is the one of the keys to achieve high performance. However, ...
Abstract—We propose a code scratchpad memory (SPM) management technique with demand paging for embed...
Many programmable embedded systems feature low power processors coupled with fast compiler controlle...
Abstract—This paper presents a compiler strategy to optimize data accesses in regular array-intensiv...
Abstract—An effectively designed and efficiently used memory hierarchy, composed of scratch-pads or ...
Memory management searches for the resources required to store the concurrently alive elements. The ...
As the existing techniques that empower the modern high-performance processors are being refined and...
Leveraging the power of scratchpad memories (SPMs) available in most embedded systems today is cruci...
Many embedded array-intensive applications have irregular access patterns that are not amenable to s...
Abstract—Exploiting runtime memory access traces can be a complementary approach to compiler optimiz...
Scratch-pad memory (SPM), a fast on-chip SRAM managed by software, is widely used in embedded system...
An important technique for alleviating the memory bottleneck is data prefetching. Data prefetching ...
Scratchpads have been widely proposed as an alternative to caches for embedded systems. Advantages o...
Modern operating systems use main memory as a cache over disk-based storage. The time spent waiting ...
The design of future high-performance embedded systems is hampered by two problems: First, the requi...
Efficient data supply to the processor is the one of the keys to achieve high performance. However, ...
Abstract—We propose a code scratchpad memory (SPM) management technique with demand paging for embed...
Many programmable embedded systems feature low power processors coupled with fast compiler controlle...
Abstract—This paper presents a compiler strategy to optimize data accesses in regular array-intensiv...
Abstract—An effectively designed and efficiently used memory hierarchy, composed of scratch-pads or ...
Memory management searches for the resources required to store the concurrently alive elements. The ...
As the existing techniques that empower the modern high-performance processors are being refined and...