International audienceVirtualization and just-in-time (JIT) compilation have become important paradigms in computer science to address application portability issues without deteriorating average-case performance. Unfortunately, JIT compilation raises predictability issues, which currently hinder its dissemination in real-time applications. Our work aims at reconciling the two domains, i.e. taking advantage of the portability and performance provided by JIT compilation, while providing predictability guarantees. As a first step towards this ambitious goal, we study two structures of code caches and demonstrate their predictability. On the one hand, the studied binary code caches avoid too frequent function recompilations, providing good ave...
Cache memories have been extensively used to bridge the gap between high speed processors and relati...
Obtaining Worst-Case Execution Time (WCET) estimates is a required step in real-time embedded system...
Contemporary Microprocessors are highly optimised to-wards average case performance using caches and...
International audienceVirtualization and just-in-time (JIT) compilation have become important paradi...
The productivity of embedded software development is limited by the high fragmentation of hardware p...
Probabilistic timing analysis (PTA), a promising alternative to traditional worst-case execution tim...
This paper shows that a program using a time-predictable memory system for data storage can achieve ...
While caches have become invaluable for higher-end architectures due to their ability to hide, in pa...
While caches have become invaluable for higher-end architectures due to their ability to hide, in pa...
The use of caches challenges measurement-based timing analysis (MBTA) in critical embedded systems. ...
This master’s thesis examines the possibility to heuristically optimise instruction cache performanc...
The execution time of software for hard real-time systems must be predictable. Further, safe and not...
The growing complexity of modern computer architectures increasingly complicates the prediction of t...
The growing complexity of modern computer architectures increasingly complicates the prediction of t...
© Elsevier. This manuscript version is made available under the CC-BY-NC-ND 4.0 license http://crea...
Cache memories have been extensively used to bridge the gap between high speed processors and relati...
Obtaining Worst-Case Execution Time (WCET) estimates is a required step in real-time embedded system...
Contemporary Microprocessors are highly optimised to-wards average case performance using caches and...
International audienceVirtualization and just-in-time (JIT) compilation have become important paradi...
The productivity of embedded software development is limited by the high fragmentation of hardware p...
Probabilistic timing analysis (PTA), a promising alternative to traditional worst-case execution tim...
This paper shows that a program using a time-predictable memory system for data storage can achieve ...
While caches have become invaluable for higher-end architectures due to their ability to hide, in pa...
While caches have become invaluable for higher-end architectures due to their ability to hide, in pa...
The use of caches challenges measurement-based timing analysis (MBTA) in critical embedded systems. ...
This master’s thesis examines the possibility to heuristically optimise instruction cache performanc...
The execution time of software for hard real-time systems must be predictable. Further, safe and not...
The growing complexity of modern computer architectures increasingly complicates the prediction of t...
The growing complexity of modern computer architectures increasingly complicates the prediction of t...
© Elsevier. This manuscript version is made available under the CC-BY-NC-ND 4.0 license http://crea...
Cache memories have been extensively used to bridge the gap between high speed processors and relati...
Obtaining Worst-Case Execution Time (WCET) estimates is a required step in real-time embedded system...
Contemporary Microprocessors are highly optimised to-wards average case performance using caches and...