As technology scales down and CMOS circuits are powered by lower supply voltages, standby leakage current becomes significant. A behavioral level framework for the synthesis of data-paths with low leakage power is presented. There has been minimal work done on the behavioral synthesis of low leakage datapaths. We present a fast architectural simulator for leakage (FASL) to estimate the leakage power dissipated by a system described hierarchically in VHDL. FASL uses a leakage power model embedded into VHDL leafcells. These leafcells are characterized for leakage accurately using HSPICE. We present results which show that FASL measures leakage power significantly faster than HSPICE, with less than a 5% loss in accuracy, compared to HSPICE. We...
Minimizing dynamic power consumption in digital circuits was the primary design objective in most of...
In this paper, two packing algorithms for the detection of ac-tivity profiles in MTCMOS-based FPGA s...
An electronic system/appliance/portable device with high speed, low power, and feasible area has bec...
As technology scales down and CMOS circuits are powered by lower supply voltages, standby leakage cu...
Traditional approaches for power optimization during high level synthesis, have targetted single-cyc...
Traditional approaches for power optimization during high level synthesis, have targetted single-cyc...
Leakage power loss is a major concern in deep-submicron technologies. High-performance processors an...
Scaling of CMOS technology has enabled a phenomenal growth in computing capability throughout the la...
Traditional approaches for power optimization during high level synthesis, have targetted single-cyc...
As silicon technology scaling, leakage power dissipation has become the most significant component f...
AbstractThe leakage power dissipation has become one of the most challenging issues in low power VLS...
With aggressive scaling of device dimensions, threshold voltages and oxide-thicknesses, leakage-powe...
With aggressive scaling of device dimensions, threshold voltages and oxide-thicknesses, leakage-powe...
High leakage current in deep sub-micron regimes is a significant contributor to the power dissipatio...
With advances in CMOS- technology and sub-micron process, leakage power dissipation has become a cri...
Minimizing dynamic power consumption in digital circuits was the primary design objective in most of...
In this paper, two packing algorithms for the detection of ac-tivity profiles in MTCMOS-based FPGA s...
An electronic system/appliance/portable device with high speed, low power, and feasible area has bec...
As technology scales down and CMOS circuits are powered by lower supply voltages, standby leakage cu...
Traditional approaches for power optimization during high level synthesis, have targetted single-cyc...
Traditional approaches for power optimization during high level synthesis, have targetted single-cyc...
Leakage power loss is a major concern in deep-submicron technologies. High-performance processors an...
Scaling of CMOS technology has enabled a phenomenal growth in computing capability throughout the la...
Traditional approaches for power optimization during high level synthesis, have targetted single-cyc...
As silicon technology scaling, leakage power dissipation has become the most significant component f...
AbstractThe leakage power dissipation has become one of the most challenging issues in low power VLS...
With aggressive scaling of device dimensions, threshold voltages and oxide-thicknesses, leakage-powe...
With aggressive scaling of device dimensions, threshold voltages and oxide-thicknesses, leakage-powe...
High leakage current in deep sub-micron regimes is a significant contributor to the power dissipatio...
With advances in CMOS- technology and sub-micron process, leakage power dissipation has become a cri...
Minimizing dynamic power consumption in digital circuits was the primary design objective in most of...
In this paper, two packing algorithms for the detection of ac-tivity profiles in MTCMOS-based FPGA s...
An electronic system/appliance/portable device with high speed, low power, and feasible area has bec...