Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2001.Includes bibliographical references (p. 77-80).In this thesis, we evaluate the feasibility of exposing elements in a processor's datapath to the compiler in order to reduce energy consumption. We focus on eliminating register file traffic by exposing the latches in the bypass network, as our study shows that there is potential for significant benefit by doing this. We present the idea of software restart markers to handle the exception management overhead that results from exposing additional processor state. We then implement our proposed techniques and observe an average energy savings of 7.0% across a range of benchmarks when ...
Extensive research has been done in prefetching techniques that hide memory latency in microprocesso...
Energy efficiency is one of the key metrics in the design of a wide range of processor types. For ex...
Today’s superscalar microprocessors use large, heavily-ported physical register files (RFs) to incre...
Exposing details of the processor datapath to the programmer is motivated by improvements in the ene...
Abstract Modern performance-oriented ISAs, such as RISC and VLIW, only expose to software features t...
In modern processor architectures, the register file (RF) consumes considerable amount of the proces...
In a modern processor architecture the register file (RF) consumes considerable amount of power. The...
Superscalar processors contain large, complex structures to hold data and instructions as they wait ...
Power gating is a technique commonly used for runtime leakage reduction in digital CMOS circuits. In...
In a modern processor architecture the register ??le (RF) consumes considerable amount of power. The...
[[abstract]]Power leakage constitutes an increasing fraction of the total power consumption in moder...
The register file is a power-hungry device in modern architectures. Current research on compiler tec...
Abstract—In modern processor architectures, the register file (RF) consumes considerable amount of t...
Exposed Datapath Architectures (EDPAs) with aggressively pruned data-path connectivity, where not al...
Exposed Datapath Architectures (EDPAs) with aggressively pruned data-path connectivity, where not al...
Extensive research has been done in prefetching techniques that hide memory latency in microprocesso...
Energy efficiency is one of the key metrics in the design of a wide range of processor types. For ex...
Today’s superscalar microprocessors use large, heavily-ported physical register files (RFs) to incre...
Exposing details of the processor datapath to the programmer is motivated by improvements in the ene...
Abstract Modern performance-oriented ISAs, such as RISC and VLIW, only expose to software features t...
In modern processor architectures, the register file (RF) consumes considerable amount of the proces...
In a modern processor architecture the register file (RF) consumes considerable amount of power. The...
Superscalar processors contain large, complex structures to hold data and instructions as they wait ...
Power gating is a technique commonly used for runtime leakage reduction in digital CMOS circuits. In...
In a modern processor architecture the register ??le (RF) consumes considerable amount of power. The...
[[abstract]]Power leakage constitutes an increasing fraction of the total power consumption in moder...
The register file is a power-hungry device in modern architectures. Current research on compiler tec...
Abstract—In modern processor architectures, the register file (RF) consumes considerable amount of t...
Exposed Datapath Architectures (EDPAs) with aggressively pruned data-path connectivity, where not al...
Exposed Datapath Architectures (EDPAs) with aggressively pruned data-path connectivity, where not al...
Extensive research has been done in prefetching techniques that hide memory latency in microprocesso...
Energy efficiency is one of the key metrics in the design of a wide range of processor types. For ex...
Today’s superscalar microprocessors use large, heavily-ported physical register files (RFs) to incre...