Integrity assurance of configuration data has a significant impact on microcontroller-based systems reliability. This is especially true when running applications driven by events which behavior is tightly coupled to this kind of data. This work proposes a new hybrid technique that combines hardware and software resources for detecting and recovering soft-errors in system configuration data. Our approach is based on the utilization of a common built-in microcontroller resource (timer) that works jointly with a software-based technique, which is responsible to periodically refresh the configuration data. The experiments demonstrate that non-destructive single event effects can be effectively mitigated with reduced overheads. Results show an ...
Due to technology scaling, which means reduced transistor size, higher density, lower voltage and mo...
This paper presents a novel methodology for the HW/SW co-design of fault tolerant embedded systems t...
The negative impact of the aggressive scaling of technology nodes on the sensitivity of CMOS devices...
Integrity assurance of configuration data has a significant impact on microcontroller-based systems ...
Soft errors are faults which are not caused by defective hardware, rather they are induced due to no...
Commercial off-the-shelf microprocessors are the core of low-cost embedded systems due to their prog...
Comunicación presentada en the 11th European Conference on Radiation and its Effects on Components a...
Successive generations of processors use smaller transistors in the quest to make more powerful comp...
This paper presents an empirical investigation on the soft error sensitivity (SES) of microprocessor...
Embedded systems are increasingly deployed in harsh environments that their components were not nece...
This paper proposes the use of metrics to refine system design for soft errors protection in system ...
CMOS technology scaling is bringing new challenges to the designers in the form of new failure modes...
According to Moore’s law, technology scaling is continuously providing smaller and faster devices. T...
This thesis investigates techniques for making closed loop control systems fault-tolerant and robust...
The use of microprocessor-based systems is gaining importance in application domains where safety i...
Due to technology scaling, which means reduced transistor size, higher density, lower voltage and mo...
This paper presents a novel methodology for the HW/SW co-design of fault tolerant embedded systems t...
The negative impact of the aggressive scaling of technology nodes on the sensitivity of CMOS devices...
Integrity assurance of configuration data has a significant impact on microcontroller-based systems ...
Soft errors are faults which are not caused by defective hardware, rather they are induced due to no...
Commercial off-the-shelf microprocessors are the core of low-cost embedded systems due to their prog...
Comunicación presentada en the 11th European Conference on Radiation and its Effects on Components a...
Successive generations of processors use smaller transistors in the quest to make more powerful comp...
This paper presents an empirical investigation on the soft error sensitivity (SES) of microprocessor...
Embedded systems are increasingly deployed in harsh environments that their components were not nece...
This paper proposes the use of metrics to refine system design for soft errors protection in system ...
CMOS technology scaling is bringing new challenges to the designers in the form of new failure modes...
According to Moore’s law, technology scaling is continuously providing smaller and faster devices. T...
This thesis investigates techniques for making closed loop control systems fault-tolerant and robust...
The use of microprocessor-based systems is gaining importance in application domains where safety i...
Due to technology scaling, which means reduced transistor size, higher density, lower voltage and mo...
This paper presents a novel methodology for the HW/SW co-design of fault tolerant embedded systems t...
The negative impact of the aggressive scaling of technology nodes on the sensitivity of CMOS devices...