Modeling and Minimization of Integrated Circuit Packaging Parasitics at Radio Frequencies

Many integrated circuits are connected to their packaging pins through bondwires. Due to the low cost of bondwires, there is interest in extending operating frequencies or negating their effects in order to keep the price of packaged integrated circuits as low as possible. Bondwires function as lumped circuits consisting of inductors, capacitors, and resistors which can be modeled based on wire geometry. Knowing this, models can be created which approximate the effects of bondwires. With the knowledge of these models, compensation techniques can be implemented which will match the bondwire impedance to the signal line impedance. The effects of these elements on circuit operation is apparent on both signal and power lines to devices. This dissertation is going to present 1. A bondwire model based on physical characteristics of interconnections including neighboring wires. The model is tested against data from fabricated test fixtures, and results compared to those produced by current software. 2. A compensation method for performance degradation caused by bondwires at radio frequencies. Test fixtures implementing these methods are fabricated and checked with results compared to predictions. 3. A method of component stacking which can be used to attach passive components directly to IC die. -Use of above method to improve power distribution network (PDN) performance. Theoretical results are compared to measured test fixture results. -Use of above method to improve performance of off device filters through Q-factor improvement. Improvement verified through test and analysis of a physical test fixture