Execution Time Minimization Based on Hardware/Software Partitioning and Speculative Prefetch

This report addresses the problem of minimizing the average execution time of an application, based on speculative FPGA configuration prefetch. Dynamically reconfigurable systems (like FPGAs) provide both the performance of hardware acceleration and the flexibility and adaptability that modern applications require. Unfortunately, one of their main drawbacks that significantly impacts performance is the high reconfiguration overhead. Configuration prefetching is one method to reduce this penalty by overlapping FPGA reconfigurations with useful computations. In order to make it effective and to avoid very high misprediction penalties, it is important to prefetch the configurations that provide the highest performance improvement, and to do this early enough to hide the reconfiguration overhead. In this report we propose a speculative approach that schedules prefetches at design time and simultaneously performs HW/SW partitioning, in order to minimize the expected execution time of an application. Our method prefetches and executes in hardware those configurations that provide the highest performance improvement. The algorithm takes into consideration profiling information (such as branch probabilities and execution time distributions), correlated with the application characteristics. We demonstrate the effectiveness of our approach compared to the previous state-of-art using extensive experiments, including real-life case studies