technical reportWe present a systematic approach to decompose and incrementally build the proof of correctness of pipelined microprocessors. The central idea is to construct the abstraction function using completion functions, one per unfinished instruction, each of which specify the effect (on the observables) of completing the instruction. In addition to avoiding term-size and case explosion as could happen for deep and complex pipelines during flushing and helping localize errors, our method can also handle stages with iterative loops. The technique is illustrated on pipelined- as well as a superscalar pipelined implementations of a subset of the DLX architecture
We present a way to abstract functional units in symbolic simulation of actual circuits, thus achiev...
this paper, we call it the symbolic execution method. The symbolic execution method is highly automa...
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer S...
We present a systematic approach to decompose and incrementally build the proof of correctness of pi...
The Completion Functions Approach was proposed in [HSG98] as a systematic way to decompose the proof...
We study the applicability of the logic of Positive Equality with Uninterpreted Functions (PEUF) [2]...
We study the applicability of the logic of Positive Equality with Uninterpreted Functions (PEUF) [2...
In microprocessors, achieving an efficient utilization of the execution units is a key factor in imp...
AbstractWe apply algebraic tools for modelling microprocessors to the specification, implementation,...
Microprocessor pipelining is a well-established technique that improves performance and reduces powe...
The paper presents a sequence of three projects on design and formal verification of pipelined and s...
AbstractWe present a method for pipeline verification using SMT solvers. It is based on a non-determ...
Abstract. Presented is a highly automatic approach for proving bounded liveness of pipelined process...
Abstract — In this paper, we propose a verification method for pipelined microprocessors with out-of...
We present a way to abstract functional units in symbolic simulation of actual circuits, thus achie...
We present a way to abstract functional units in symbolic simulation of actual circuits, thus achiev...
this paper, we call it the symbolic execution method. The symbolic execution method is highly automa...
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer S...
We present a systematic approach to decompose and incrementally build the proof of correctness of pi...
The Completion Functions Approach was proposed in [HSG98] as a systematic way to decompose the proof...
We study the applicability of the logic of Positive Equality with Uninterpreted Functions (PEUF) [2]...
We study the applicability of the logic of Positive Equality with Uninterpreted Functions (PEUF) [2...
In microprocessors, achieving an efficient utilization of the execution units is a key factor in imp...
AbstractWe apply algebraic tools for modelling microprocessors to the specification, implementation,...
Microprocessor pipelining is a well-established technique that improves performance and reduces powe...
The paper presents a sequence of three projects on design and formal verification of pipelined and s...
AbstractWe present a method for pipeline verification using SMT solvers. It is based on a non-determ...
Abstract. Presented is a highly automatic approach for proving bounded liveness of pipelined process...
Abstract — In this paper, we propose a verification method for pipelined microprocessors with out-of...
We present a way to abstract functional units in symbolic simulation of actual circuits, thus achie...
We present a way to abstract functional units in symbolic simulation of actual circuits, thus achiev...
this paper, we call it the symbolic execution method. The symbolic execution method is highly automa...
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer S...