We study the applicability of the logic of Positive Equality with Uninterpreted Functions (PEUF) [2][3] to the verification of pipelined microprocessors with very large Instruction Set Architectures (ISAs). Abstraction of memory arrays and functional units is employed, while the control logic of the processors is kept intact from the original gate-level designs. PEUF is an extension of the logic of Equality with Uninterpreted Functions, introduced by Burch and Dill [4], that allows us to use distinct constants for the data operands and instruction addresses needed in the symbolic expression for the correctness criterion. We present several techniques that make PEUF scale very efficiently for the verification of pipelined microprocessors wit...
The logic of equality with uninterpreted functions (EUF) provides a means of abstracting the ma-nipu...
Rewriting rules and Positive Equality [4] are combined in an automatic way in order to formally veri...
Abstract — In this paper, we propose a verification method for pipelined microprocessors with out-of...
We study the applicability of the logic of Positive Equality with Uninterpreted Functions (PEUF) [2...
In using the logic of equality with unininterpreted functions to verify hardware systems, specific ...
Modern processors have relatively simple specificationsbased on their instruction set architectures....
The logic of Equality with Uninterpreted Functions (EUF) provides a means of abstracting the manipul...
We describe an efficient validity checker for the quantifier-free logic of equality with uninterpret...
We present a collection of ideas that allows the pipeline verification method pioneered by Burch an...
We present a way to abstract functional units in symbolic simulation of actual circuits, thus achie...
We present a way to abstract functional units in symbolic simulation of actual circuits, thus achiev...
In microprocessors, achieving an efficient utilization of the execution units is a key factor in imp...
The logic of equality with uninterpreted functions (EUF) provides a means of abstracting the manipul...
technical reportWe present a systematic approach to decompose and incrementally build the proof of c...
AbstractWe compare SAT-checkers and decision diagrams on the evaluation of Boolean formulae produced...
The logic of equality with uninterpreted functions (EUF) provides a means of abstracting the ma-nipu...
Rewriting rules and Positive Equality [4] are combined in an automatic way in order to formally veri...
Abstract — In this paper, we propose a verification method for pipelined microprocessors with out-of...
We study the applicability of the logic of Positive Equality with Uninterpreted Functions (PEUF) [2...
In using the logic of equality with unininterpreted functions to verify hardware systems, specific ...
Modern processors have relatively simple specificationsbased on their instruction set architectures....
The logic of Equality with Uninterpreted Functions (EUF) provides a means of abstracting the manipul...
We describe an efficient validity checker for the quantifier-free logic of equality with uninterpret...
We present a collection of ideas that allows the pipeline verification method pioneered by Burch an...
We present a way to abstract functional units in symbolic simulation of actual circuits, thus achie...
We present a way to abstract functional units in symbolic simulation of actual circuits, thus achiev...
In microprocessors, achieving an efficient utilization of the execution units is a key factor in imp...
The logic of equality with uninterpreted functions (EUF) provides a means of abstracting the manipul...
technical reportWe present a systematic approach to decompose and incrementally build the proof of c...
AbstractWe compare SAT-checkers and decision diagrams on the evaluation of Boolean formulae produced...
The logic of equality with uninterpreted functions (EUF) provides a means of abstracting the ma-nipu...
Rewriting rules and Positive Equality [4] are combined in an automatic way in order to formally veri...
Abstract — In this paper, we propose a verification method for pipelined microprocessors with out-of...