A Compiler for Silage

this paper, we describe a compiler for Silage, and discuss how it deals with some of the idiosyncrasies of the language. As a target application, signal processing is both a blessing and a curse. It allows some simplifying assumptions to be made, but at the same time imposes constraints that are difficult to meet. Often, the final result of compilation is an implementation in dedicated VLSI. When an entire system is on a single chip, the program is allotted only part of the silicon area; the rest implements the peripheral and support functions to the processor, or even other processors. Yet, the program must meet real time sampling constraints. As a result, engineers are accustomed to programming in assembly language or even horizontal microcode to achieve the required speed. For a high-level language to be acceptable, the object code must be efficient. In addition, Silage supports many signal-processing-specific features (such as fixed-point numbers and data streams as built-in data types). These features make the language more expressive, but place additional burdens on the compiler. On the plus side, going from program to hardware implies a long turnaround time, time that is dominated by fabrication. Therefore, the compiler can be slower than those for general-purpose languages. With the extra time, more optimizations---thus higher quality output---are possible. Also, when the only implementation is in silicon, programs must be debugged in simulation. With a high-level language comes the ability to simulate on the source level, with the twin advantages of taking the slow compiler out of the debug cycle and relieving the programmer from dealing with assembly or even machine language