SECOND GENERATION SILICON COMPILER FOR BIT-SERIAL SIGNAL PROCESSING ARCHITECTURE.

A silicon compiler for bit-serial signal-processing architecture is described. Some of its features are inherited from the FIRST compiler. A description language is designed to provide a higher-level abstraction and concise specification of physical systems. The compiler automatically computes all the necessary timing requirements for bit-serial time-alignment and generates the necessary control networks. Two examples, a second order autorecursive filter and a fast Fourier transform processor are used as illustrations of the features provided by the compiler.link_to_subscribed_fulltex