In this paper, we present MemShuffle, an end-to-end mem-ory protection scheme that resists several attacks on cur-rent memory systems. Our protection scheme provides se-curity against both side channel attacks on caches, as well as physical on-bus memory snooping, to keep memory secrets within the process that owns them. Our approach utilizes micro-architecture changes in the CPU’s Memory Manage-ment Unit (MMU) to create a secret per-page memory map-ping from virtual address offsets to physical address offsets. This approach minimizes programmer effort, while incurring an average overhead of only 2.5%. 1
Memory corruption attacks on SCADA devices can cause significant dis- ruptions to control systems an...
Modern systems rely on Address-Space Layout Ran-domization (ASLR) and Data Execution Prevention (DEP...
Today, nearly all modern devices, including smartphones, PCs, and cloud servers, benefit significant...
The address sequence on the processor-memory bus can reveal abundant information about the control o...
In the vulnerability analysis of System on Chips, memory hierarchy is considered among the most valu...
International audienceIn the vulnerability analysis of System on Chips, memory hierarchy is consider...
Recent years have seen various side-channel timing attacks demonstrated on both CPUs and GPUs, in di...
Non-volatile memories provide energy efficiency, tolerance against power failure, and “instant-on” p...
Code Reuse Attacks can trick the CPU into performing some actions not originally intended by the run...
Phase change memory (PCM) technology appears as more scalable than DRAM technology. As PCM exhibits ...
As modern 64-bit x86 processors no longer support the segmentation capabilities of their 32-bit pred...
Cryptographic algorithm implementations are vulnerable to Cold Boot attacks, which consist in exploi...
Cache attacks have increasingly gained momentum in the security community. In such attacks, attacker...
In this paper, we advocate for a general-purpose, fine-grain memory protection mechanism for use by ...
Some algorithms running with compromised data select cache memory as a type of secure memory where d...
Memory corruption attacks on SCADA devices can cause significant dis- ruptions to control systems an...
Modern systems rely on Address-Space Layout Ran-domization (ASLR) and Data Execution Prevention (DEP...
Today, nearly all modern devices, including smartphones, PCs, and cloud servers, benefit significant...
The address sequence on the processor-memory bus can reveal abundant information about the control o...
In the vulnerability analysis of System on Chips, memory hierarchy is considered among the most valu...
International audienceIn the vulnerability analysis of System on Chips, memory hierarchy is consider...
Recent years have seen various side-channel timing attacks demonstrated on both CPUs and GPUs, in di...
Non-volatile memories provide energy efficiency, tolerance against power failure, and “instant-on” p...
Code Reuse Attacks can trick the CPU into performing some actions not originally intended by the run...
Phase change memory (PCM) technology appears as more scalable than DRAM technology. As PCM exhibits ...
As modern 64-bit x86 processors no longer support the segmentation capabilities of their 32-bit pred...
Cryptographic algorithm implementations are vulnerable to Cold Boot attacks, which consist in exploi...
Cache attacks have increasingly gained momentum in the security community. In such attacks, attacker...
In this paper, we advocate for a general-purpose, fine-grain memory protection mechanism for use by ...
Some algorithms running with compromised data select cache memory as a type of secure memory where d...
Memory corruption attacks on SCADA devices can cause significant dis- ruptions to control systems an...
Modern systems rely on Address-Space Layout Ran-domization (ASLR) and Data Execution Prevention (DEP...
Today, nearly all modern devices, including smartphones, PCs, and cloud servers, benefit significant...