A Low-cost Memory Remapping Scheme for Address Bus Protection

The address sequence on the processor-memory bus can reveal abundant information about the control ow of a program. This can lead to critical information leakage such as encryption keys or proprietary algorithms. Addresses can be observed by attaching a hardware device on the bus that passively monitors the bus transaction. Such side-channel attacks should be given rising attention especially in a distributed computing environment, where remote servers running sensitive programs are not within the physical control of the client. Two previously proposed hardware techniques tackled this problem through randomizing address patterns on the bus. One proposal permutes a set of contiguous memory blocks under certain conditions, while the other approach randomly swaps two blocks when necessary. In this paper, we present an anatomy of these attempts and show that they impose great pressure on both the memory and the disk. This leaves them less scalable in high-performance sys-tems where the bandwidth of the bus and memory are critical resources. We propose a lightweight solution to alleviating the pres-sure without compromising the security strength. The results show that our technique can reduce the memory trafc by a factor of 10 compared with the prior scheme, while keeping almost the same page fault rate as a baseline system with no security protection