Some algorithms running with compromised data select cache memory as a type of secure memory where data is confined and not transferred to main memory. However, cold-boot attacks that target cache memories exploit the data remanence. Thus, a sudden power shutdown may not delete data entirely, giving the opportunity to steal data. The biggest challenge for any technique aiming to secure the cache memory is performance penalty. Techniques based on data scrambling have demonstrated that security can be improved with a limited reduction in performance. However, they still cannot resist side-channel attacks like power or electromagnetic analysis. This paper presents a review of known attacks on memories and countermeasures proposed so far and an...
We expand on the idea, proposed by Kelsey et al. [14], of cache memory being used as a side-channel ...
International audienceIn the vulnerability analysis of System on Chips, memory hierarchy is consider...
This work was funded thanks to the French national program ”Programme d’Investissement d’Avenir IRT ...
Some algorithms running with compromised data select cache memory as a type of secure memory where d...
Memory remanence in SRAMs and DRAMs is usually exploited through cold-boot attacks and the targets ...
Abstract — Microprocessor memory is sensitive to cold boot attacks. In this kind of attacks, memory ...
Microprocessor memory is sensitive to cold boot attacks. In this kind of attacks, memory remanence i...
Memory systems security has increased over the last decade due to the sensitive information which is...
The last decade has recorded an increase in security protocols for integrated circuits and memory sy...
A wide range of attacks that target cache memories in secure systems have been reported in the last ...
Remote side-channel attacks on processors exploit hardware and micro-architectural effects observabl...
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike p...
AbstractAs hard disk encryption, RAM disks, persistent data avoidance technology and memory-only mal...
In the vulnerability analysis of System on Chips, memory hierarchy is considered among the most valu...
Today, nearly all modern devices, including smartphones, PCs, and cloud servers, benefit significant...
We expand on the idea, proposed by Kelsey et al. [14], of cache memory being used as a side-channel ...
International audienceIn the vulnerability analysis of System on Chips, memory hierarchy is consider...
This work was funded thanks to the French national program ”Programme d’Investissement d’Avenir IRT ...
Some algorithms running with compromised data select cache memory as a type of secure memory where d...
Memory remanence in SRAMs and DRAMs is usually exploited through cold-boot attacks and the targets ...
Abstract — Microprocessor memory is sensitive to cold boot attacks. In this kind of attacks, memory ...
Microprocessor memory is sensitive to cold boot attacks. In this kind of attacks, memory remanence i...
Memory systems security has increased over the last decade due to the sensitive information which is...
The last decade has recorded an increase in security protocols for integrated circuits and memory sy...
A wide range of attacks that target cache memories in secure systems have been reported in the last ...
Remote side-channel attacks on processors exploit hardware and micro-architectural effects observabl...
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike p...
AbstractAs hard disk encryption, RAM disks, persistent data avoidance technology and memory-only mal...
In the vulnerability analysis of System on Chips, memory hierarchy is considered among the most valu...
Today, nearly all modern devices, including smartphones, PCs, and cloud servers, benefit significant...
We expand on the idea, proposed by Kelsey et al. [14], of cache memory being used as a side-channel ...
International audienceIn the vulnerability analysis of System on Chips, memory hierarchy is consider...
This work was funded thanks to the French national program ”Programme d’Investissement d’Avenir IRT ...