Add to ORKGA wide range of attacks that target cache memories in secure systems have been reported in the last half decade. Cold-boot attacks can be thwarted through the recently proposed Interleaved Scrambling Technique (IST). However, side channel attacks like the Simple Power Analysis (SPA) can still circumvent this protection. Error detection and correction codes (EDC/ECC) are employed in memories to increase reliability, but they can also be used to increase the security. This paper proposes to boost the IST with an ECC code in order to create a cache resistant against SPA-attacks. The redundancy provided by the ECC code is used to create confusion by enlarging the search space where the hacker has to look for to find the secret keys
The need for fast but secure cryptographic systems is growing bigger. Therefore, dedicated hardware ...
Advancements in technology, the need for automation and ease of manufacturability, have made embedde...
Covert channels are a fundamental concept for cryptanalytic side-channel attacks. Covert timing chan...
Microprocessor memory is sensitive to cold boot attacks. In this kind of attacks, memory remanence i...
Abstract — Microprocessor memory is sensitive to cold boot attacks. In this kind of attacks, memory ...
Some algorithms running with compromised data select cache memory as a type of secure memory where d...
The last decade has recorded an increase in security protocols for integrated circuits and memory sy...
Memory systems security has increased over the last decade due to the sensitive information which is...
Memory remanence in SRAMs and DRAMs is usually exploited through cold-boot attacks and the targets ...
Today, nearly all modern devices, including smartphones, PCs, and cloud servers, benefit significant...
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike p...
We expand on the idea, proposed by Kelsey et al. [14], of cache memory being used as a side-channel ...
Given the increasing impact of Rowhammer, and the dearth of adequate other hardware defenses, many i...
This work was funded thanks to the French national program ”Programme d’Investissement d’Avenir IRT ...
Security and trustworthiness are key considerations in designing modern processor hardware. It has b...
The need for fast but secure cryptographic systems is growing bigger. Therefore, dedicated hardware ...
Advancements in technology, the need for automation and ease of manufacturability, have made embedde...
Covert channels are a fundamental concept for cryptanalytic side-channel attacks. Covert timing chan...
Microprocessor memory is sensitive to cold boot attacks. In this kind of attacks, memory remanence i...
Abstract — Microprocessor memory is sensitive to cold boot attacks. In this kind of attacks, memory ...
Some algorithms running with compromised data select cache memory as a type of secure memory where d...
The last decade has recorded an increase in security protocols for integrated circuits and memory sy...
Memory systems security has increased over the last decade due to the sensitive information which is...
Memory remanence in SRAMs and DRAMs is usually exploited through cold-boot attacks and the targets ...
Today, nearly all modern devices, including smartphones, PCs, and cloud servers, benefit significant...
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike p...
We expand on the idea, proposed by Kelsey et al. [14], of cache memory being used as a side-channel ...
Given the increasing impact of Rowhammer, and the dearth of adequate other hardware defenses, many i...
This work was funded thanks to the French national program ”Programme d’Investissement d’Avenir IRT ...
Security and trustworthiness are key considerations in designing modern processor hardware. It has b...
The need for fast but secure cryptographic systems is growing bigger. Therefore, dedicated hardware ...
Advancements in technology, the need for automation and ease of manufacturability, have made embedde...
Covert channels are a fundamental concept for cryptanalytic side-channel attacks. Covert timing chan...