When designing embedded systems, one needs to make decisions concerning the different components that will be included in a microprocessor. An important issue is the chip area vs. performance trade-off. In this paper we investigate the relationship between chip area and performance for su-perscalar microprocessors. We investigate the feasibility to obtain a suitable configuration by searching. We show that our approach gives a good configuration after 100 to 150 iterations using a simple random search algorithm. This shows the feasibility of our approach, in particular when more sophisticated search algorithms are employed as we plan in future work. 1
A new performance and area optimization algorithm for complex VLSI systems is presented. It is widel...
The evaluation of the best system-level architecture in terms of energy and performance is of mainly...
A theoretical technique for the minimization of a function by a random search is presented. The sear...
Designing a microprocessor involves determining the optimal microarchitecture for a given objective ...
The continuous scaling of nanoelectronics is increasing the complexity of chip multiprocessors (CMPs...
In recent years reducing power has become a critical design goal for high-performance microprocessor...
Design Space Exploration (DSE) for embedded system design with its multi-objective nature and large ...
Programmable Systems-on-Chips (SoCs) are expected to incorporate a larger number of application-spec...
Abstract. As process technology scales down, power wall starts to hinder improvements in processor p...
As integrated circuit density increases, computer architects face the interesting problem of how bes...
In this paper, we propose a system-level design methodology for the efficient exploration of the arc...
Past studies use deterministic models to evaluate optimal cache configuration or to explore its desi...
This chapter is dedicated to the optimization algorithms developed in the MULTICUBE project and to t...
Abstract. In this paper, we introduce a novel approach to guide tile size se-lection by employing an...
This paper presents an automatic design space exploration using processor design knowledge for the m...
A new performance and area optimization algorithm for complex VLSI systems is presented. It is widel...
The evaluation of the best system-level architecture in terms of energy and performance is of mainly...
A theoretical technique for the minimization of a function by a random search is presented. The sear...
Designing a microprocessor involves determining the optimal microarchitecture for a given objective ...
The continuous scaling of nanoelectronics is increasing the complexity of chip multiprocessors (CMPs...
In recent years reducing power has become a critical design goal for high-performance microprocessor...
Design Space Exploration (DSE) for embedded system design with its multi-objective nature and large ...
Programmable Systems-on-Chips (SoCs) are expected to incorporate a larger number of application-spec...
Abstract. As process technology scales down, power wall starts to hinder improvements in processor p...
As integrated circuit density increases, computer architects face the interesting problem of how bes...
In this paper, we propose a system-level design methodology for the efficient exploration of the arc...
Past studies use deterministic models to evaluate optimal cache configuration or to explore its desi...
This chapter is dedicated to the optimization algorithms developed in the MULTICUBE project and to t...
Abstract. In this paper, we introduce a novel approach to guide tile size se-lection by employing an...
This paper presents an automatic design space exploration using processor design knowledge for the m...
A new performance and area optimization algorithm for complex VLSI systems is presented. It is widel...
The evaluation of the best system-level architecture in terms of energy and performance is of mainly...
A theoretical technique for the minimization of a function by a random search is presented. The sear...