A Network Interface Card Architecture for I/O Virtualization in Embedded Systems

In this paper we present an architectural concept for network interface cards (NIC) targeting embedded systems and sup-porting I/O virtualization. Current solutions for high per-formance computing do not sufficiently address embedded system requirements i.e., guarantee real-time constraints and differentiated service levels as well as only utilize limited HW resources. The central ideas of our work-in-progress concept are: A scalable and streamlined NIC architecture storing the rule sets (contexts) for virtual network inter-faces and associated information like DMA descriptors and producer/consumer lists primarily in the system memory. Only for currently active interfaces or interfaces with spe-cial requirements, e.g. hard real-time, the required informa-tion is cached on the NIC. By switching between the con-texts the NIC can flexibly adapt to service a scalable num-ber of interfaces. With the contexts the proposed architec-ture also supports differentiated service levels. On the NIC (re-)configurable finite state machines (FSM) are handling the data path for I/O virtualization. This allows a more resource-limited NIC implementation. With a preliminary analysis we estimate the benefits of the proposed architec-ture and key components of the architecture are outlined