Network interface cards as first-class citizens

Network performance has improved by over an order-of-magnitude in the past decade. While, the overall system architecture itself has made modification attempts to match such growth, these changes are mostly “incremental enhance-ments, tweaks and adjustments ” that try to keep the hard-ware control hierarchy away from the network communica-tion path. However, we are rapidly reaching a stage where these adjustments are no longer sufficient to allow the net-work to realize its full capacity without being bottlenecked by the hardware control hierarchy in the system. Thus, rather than a “band-aid ” fix to high-performance networking and I/O at the compute node, in this paper we re-visit a more radi-cal approach that elevates the network interface card from a second-class citizen that resides out on an I/O interconnect to a first-class citizen that resides on the system bus. In this ar-chitecture, the network adapter would have its own cache, its own memory, its own processing units and follows the overall cache coherency and memory management protocols, much like what a regular CPU does. This architecture takes a step beyond existing system architectures and allows for direct communication data management without having to coordi-nate with the north bridge on every access.