The instruction dispatch buffer (DB, also known as an issue queue) used in modern superscalar processors is a considerable source of energy dissipation. We consider design alternatives that result in significant reductions in the power dissipation of the DB (by as much as 60%) through the use of: (a) fast comparators that dissipate energy mainly on a tag match, (b) zero byte encoding of operands to imply the presence of bytes with all zeros and, (c) bitline segmentation. Our results are validated by the execution of SPEC 95 benchmarks on true hardware level, cycle–by–cycle simulator for a superscalar processor and SPICE measurements for actual layouts of the DB and its variants in a 0.5 micron CMOS process
Large instruction windows and issue queues are key to exploiting greater instruction level paralleli...
The design of high–end microprocessors is increasingly constrained by high levels of power consumpti...
The front-end in superscalar processors must deliver high application performance in an energy-effec...
In contemporary superscalar microprocessors, issue queue is a considerable energy dissipating compon...
Traditional pulldown comparators that are used to implement associative addressing logic in supersca...
Abstract. Some of today’s superscalar processors, such as the Intel Pentium III, implement physical ...
In out-of-order issue superscalar microprocessors, instructions must be buffered before they are iss...
The issue logic of a dynamically-scheduled superscalar processor is a complex mechanism devoted to s...
Today's high performance processors operate in the GHz frequency range and dissipate approximat...
The “one–size–fits–all ” philosophy used for permanently allocating datapath resources in today’s su...
A Large instruction window is a key requirement to exploit greater Instruction Level Parallelism in ...
Superscalar processors contain large, complex structures to hold data and instructions as they wait ...
In modern superscalar processors, the complex instruction scheduler could form the critical path of ...
The need to minimize power while maximizing performance has led to recent developments of powerful s...
Conventional front-end designs attempt to maximize the number of "in-flight" instructions in the pip...
Large instruction windows and issue queues are key to exploiting greater instruction level paralleli...
The design of high–end microprocessors is increasingly constrained by high levels of power consumpti...
The front-end in superscalar processors must deliver high application performance in an energy-effec...
In contemporary superscalar microprocessors, issue queue is a considerable energy dissipating compon...
Traditional pulldown comparators that are used to implement associative addressing logic in supersca...
Abstract. Some of today’s superscalar processors, such as the Intel Pentium III, implement physical ...
In out-of-order issue superscalar microprocessors, instructions must be buffered before they are iss...
The issue logic of a dynamically-scheduled superscalar processor is a complex mechanism devoted to s...
Today's high performance processors operate in the GHz frequency range and dissipate approximat...
The “one–size–fits–all ” philosophy used for permanently allocating datapath resources in today’s su...
A Large instruction window is a key requirement to exploit greater Instruction Level Parallelism in ...
Superscalar processors contain large, complex structures to hold data and instructions as they wait ...
In modern superscalar processors, the complex instruction scheduler could form the critical path of ...
The need to minimize power while maximizing performance has led to recent developments of powerful s...
Conventional front-end designs attempt to maximize the number of "in-flight" instructions in the pip...
Large instruction windows and issue queues are key to exploiting greater instruction level paralleli...
The design of high–end microprocessors is increasingly constrained by high levels of power consumpti...
The front-end in superscalar processors must deliver high application performance in an energy-effec...