In contemporary superscalar microprocessors, issue queue is a considerable energy dissipating component due its complex scheduling logic. In addition to the energy dissipated for scheduling activities, read and write lines of the issue queue entries are also high energy consuming pieces of the issue queue. When these lines are used for reading and writing unnecessary information bits, such as the immediate operand part of an instruction that does not use the immediate field or the insignificant higher order bits of an immediate operand that are in fact not needed, significant amount of energy is wasted. In this paper, we propose two techniques to reduce the energy dissipation of the issue queue by exploiting the immediate operand files of t...
CMOS technology scaling improves the speed and functionality of microprocessors by reducing the size...
Front-end instruction delivery accounts for a significant fraction of the energy consumed in a dynam...
The need to minimize power while maximizing performance has led to recent developments of powerful s...
The issue logic of a dynamically-scheduled superscalar processor is a complex mechanism devoted to s...
A Large instruction window is a key requirement to exploit greater Instruction Level Parallelism in ...
Large instruction windows and issue queues are key to exploiting greater instruction level paralleli...
The issue logic of a superscalar processor dissipates a large amount of static and dynamic power. Fu...
Superscalar processors contain large, complex structures to hold data and instructions as they wait ...
The instruction dispatch buffer (DB, also known as an issue queue) used in modern superscalar proces...
The “one–size–fits–all ” philosophy used for permanently allocating datapath resources in today’s su...
Today's high performance processors operate in the GHz frequency range and dissipate approximat...
Abstract. Dynamic instruction scheduling logic is one of the most critical components of modern supe...
In this paper, we propose a new issue queue design that is capable of scheduling reusable instructio...
Instruction issue logic is a critical component in modern high-performance out-of-order processors. ...
As technology evolves, power density significantly increases and cooling systems become more complex...
CMOS technology scaling improves the speed and functionality of microprocessors by reducing the size...
Front-end instruction delivery accounts for a significant fraction of the energy consumed in a dynam...
The need to minimize power while maximizing performance has led to recent developments of powerful s...
The issue logic of a dynamically-scheduled superscalar processor is a complex mechanism devoted to s...
A Large instruction window is a key requirement to exploit greater Instruction Level Parallelism in ...
Large instruction windows and issue queues are key to exploiting greater instruction level paralleli...
The issue logic of a superscalar processor dissipates a large amount of static and dynamic power. Fu...
Superscalar processors contain large, complex structures to hold data and instructions as they wait ...
The instruction dispatch buffer (DB, also known as an issue queue) used in modern superscalar proces...
The “one–size–fits–all ” philosophy used for permanently allocating datapath resources in today’s su...
Today's high performance processors operate in the GHz frequency range and dissipate approximat...
Abstract. Dynamic instruction scheduling logic is one of the most critical components of modern supe...
In this paper, we propose a new issue queue design that is capable of scheduling reusable instructio...
Instruction issue logic is a critical component in modern high-performance out-of-order processors. ...
As technology evolves, power density significantly increases and cooling systems become more complex...
CMOS technology scaling improves the speed and functionality of microprocessors by reducing the size...
Front-end instruction delivery accounts for a significant fraction of the energy consumed in a dynam...
The need to minimize power while maximizing performance has led to recent developments of powerful s...