A Software Oriented Approach to

We present a software oriented approach to hardware/software codesign by applying traditional compiler techniques to the hardware/software partitioning problem and linking a compiler to a state of the art hardware synthesis technology. The system is specified in C or C++. Time critical regions are identified by means of profiling and are automatically imple-mented in user programmable logic with high level and logic synthesis design tools. The underlying architecture is an add-on board with user programmable logic, connected to a Sparc based workstation via the sys-tem bus. We present a novel partitioning technique based on a hierarchi-cal candidate preselection scheme, that utilizes profilers and estimators for performance and cost. Our approach allows (a) efficient collection of profiling data due to the usage of C and C++ as specification languages, (b) fast partitioning due to a candidate preselection scheme, and (c) high complexity of the hardware partition due to a logic emulation system