We describe Dead Value Information (DVI) and introduce three new optimizations which exploit it. DVI provides assertions that certain register values are dead, meaning they will not be read before being overwritten. The processor can use DVI to track dead registers and dynamically eliminate unnecessary save and restore instructions from the execution stream at procedure calls and context switches. Our results indicate that dynamic saves and restore instances can be reduced by 46% for procedure calls and by 51% for context switches. In addition, save/restore elimination for procedure calls can improve overall performance by up to 5%. DVI also allows the processor manage physical registers to efficiently, reducing the size requirements of the...
"© 2019 IEEE. Personal use of this material is permitted. Permissíon from IEEE must be obtained for ...
Exposed Datapath Architectures (EDPAs) with aggressively pruned data-path connectivity, where not al...
Nowadays, GPUs sit at the forefront of high-performance computing thanks to their massive computatio...
We describe Dead Value Information (DVI) and introduce three new optimizations which exploit it. DVI...
Instructions executed by the processor are dynamically dead if the values they produce are not used ...
Modern network processors such as the Intel IXP family hide the latency of slow instructions by supp...
We observe a non-negligible fraction---3 to 16% in our benchmarks ---of dynamically dead instruction...
Register window is an architectural technique that reduces memory operations required to save and re...
At present there exist three main schools of thought for improving single-threaded program performan...
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes ...
Journal ArticleDue to shrinking transistor sizes and lower supply voltages, transient faults (soft e...
This paper presents a novel compiler directed technique to reduce the register pressure and power of...
Modern network processors support high levels of parallelism in packet processing by supporting mult...
Modern superscalar processors use advanced features like dynamic scheduling and speculative executio...
The physical register file is an important component of a dynamically-scheduled processor. Increasin...
"© 2019 IEEE. Personal use of this material is permitted. Permissíon from IEEE must be obtained for ...
Exposed Datapath Architectures (EDPAs) with aggressively pruned data-path connectivity, where not al...
Nowadays, GPUs sit at the forefront of high-performance computing thanks to their massive computatio...
We describe Dead Value Information (DVI) and introduce three new optimizations which exploit it. DVI...
Instructions executed by the processor are dynamically dead if the values they produce are not used ...
Modern network processors such as the Intel IXP family hide the latency of slow instructions by supp...
We observe a non-negligible fraction---3 to 16% in our benchmarks ---of dynamically dead instruction...
Register window is an architectural technique that reduces memory operations required to save and re...
At present there exist three main schools of thought for improving single-threaded program performan...
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes ...
Journal ArticleDue to shrinking transistor sizes and lower supply voltages, transient faults (soft e...
This paper presents a novel compiler directed technique to reduce the register pressure and power of...
Modern network processors support high levels of parallelism in packet processing by supporting mult...
Modern superscalar processors use advanced features like dynamic scheduling and speculative executio...
The physical register file is an important component of a dynamically-scheduled processor. Increasin...
"© 2019 IEEE. Personal use of this material is permitted. Permissíon from IEEE must be obtained for ...
Exposed Datapath Architectures (EDPAs) with aggressively pruned data-path connectivity, where not al...
Nowadays, GPUs sit at the forefront of high-performance computing thanks to their massive computatio...