We present efficient emulations of the CRCW PRAM on a large class of processor interconnection networks called leveled networks. This class includes the star graph and the n-way shuffle, which have the interesting property that the network diameter is sub-logarithmic in the network size. We show that a CRCW PRAM can be emulated optimally on these networks (i.e., each emulation step takes time linear in the network diameter). This is the first result that demonstrates PRAM emulation in less than logarithmic time. We also present an efficient emulation of the CRCW PRAM on an n x n mesh. Although an O(n)-time emulation algorithm for the mesh is known, the underlying constant in the run-time is large, making it impractical. We give an improved ...
A simulation scheme for (n, m)-PRAM computation is devised, based on an interconnection network orga...
The reconfigurable mesh (RN-MESH) can solve a large class of problems in constant time, including pr...
The Parallel Random Access Machine (PRAM) is an abstract parallel machine consisting of a synchrono...
We present efficient emulations of the CRCW PRAM on a large class of processor interconnection netwo...
AbstractWe present a simple algorithm for emulating an N-processor CROW PRAM on an N-ode butterfly. ...
AbstractThis paper addresses the problem of simulating the CRCW PRAM on reconfigurable networks. Let...
The PRAM is a shared memory model of parallel computation which abstracts away from inessential engi...
[[abstract]]This paper addresses the problem of simulating the CRCW PRAM on reconfigurable networks....
AbstractWe show a lower bound of Ω(min{log m, √n}) on the slowdown of any deterministic emulation of...
AbstractWe present deterministic upper and lower bounds on the slowdown required to simulate an (n, ...
We present deterministic upper and lower bounds on the slowdown required to simulate an (n;m)- PRAM ...
We present deterministic upper and lower bounds on the slowdown required to simulate an (n,m)-PRAM o...
We present a constructive deterministic simulation of a PRAM with n processors and m = n^alpha; shar...
The problem of simulating a PRAM with $n$ processors and memory size $m \geq n$ on an $n$-node boun...
A deterministic scheme for the simulation of (n, m)-PRAM computation is devised. Each PRAM step is s...
A simulation scheme for (n, m)-PRAM computation is devised, based on an interconnection network orga...
The reconfigurable mesh (RN-MESH) can solve a large class of problems in constant time, including pr...
The Parallel Random Access Machine (PRAM) is an abstract parallel machine consisting of a synchrono...
We present efficient emulations of the CRCW PRAM on a large class of processor interconnection netwo...
AbstractWe present a simple algorithm for emulating an N-processor CROW PRAM on an N-ode butterfly. ...
AbstractThis paper addresses the problem of simulating the CRCW PRAM on reconfigurable networks. Let...
The PRAM is a shared memory model of parallel computation which abstracts away from inessential engi...
[[abstract]]This paper addresses the problem of simulating the CRCW PRAM on reconfigurable networks....
AbstractWe show a lower bound of Ω(min{log m, √n}) on the slowdown of any deterministic emulation of...
AbstractWe present deterministic upper and lower bounds on the slowdown required to simulate an (n, ...
We present deterministic upper and lower bounds on the slowdown required to simulate an (n;m)- PRAM ...
We present deterministic upper and lower bounds on the slowdown required to simulate an (n,m)-PRAM o...
We present a constructive deterministic simulation of a PRAM with n processors and m = n^alpha; shar...
The problem of simulating a PRAM with $n$ processors and memory size $m \geq n$ on an $n$-node boun...
A deterministic scheme for the simulation of (n, m)-PRAM computation is devised. Each PRAM step is s...
A simulation scheme for (n, m)-PRAM computation is devised, based on an interconnection network orga...
The reconfigurable mesh (RN-MESH) can solve a large class of problems in constant time, including pr...
The Parallel Random Access Machine (PRAM) is an abstract parallel machine consisting of a synchrono...