International audienceVariable Precision (VP) Floating Point (FP) is a solution to compensate accumulation and rounding errors during computing. Hardware approaches to VP FP are often preferred, since software solutions result in algorithmic performance degradation and computational instability. We propose three new VP formats and evaluate them using a RISC-V platform running on a FPGA. Preliminary results show that our VP formats are beneficial for certain applications with low-precision requirements
Using standard Floating-Point (FP) formats for computation leads to significant hardware overhead si...
This paper describes the parameterisation, implementation and evaluation of floating-point adders a...
This paper describes the parameterisation, implementation and eval-uation of floating-point adders a...
International audienceThis paper proposes an innovative Floating Point (FP) architecture for Variabl...
International audienceThe popularity and community-driven development model of RISCV have opened man...
International audienceOptimizing compilers for high performance computing only support IEEE 754 floa...
Most of the Floating-Point (FP) hardware units support the formats and the operations specified in t...
Floating point arithmetic is a common requirement in signal processing, image processing and real ti...
Abstract:- Floating point arithmetic is widely used in many areas. IEEE Standard 754 floating point ...
International audienceThere is a growing interest in the use of reduced-precision arithmetic, exacer...
International audienceFloating-Point (FP) units in processors are generally limited to supporting a ...
Abstract: Floating point numbers are one possible way of representing real numbers in binary format;...
Reference Librarian Date Field Programmable Gate Arrays (FPGAs) are frequently used to accelerate si...
International audienceFloating-Point (FP) computation using standard IEEE formats has a significant ...
Most scientific computations use double precision floating point numbers. Recently, posits as an add...
Using standard Floating-Point (FP) formats for computation leads to significant hardware overhead si...
This paper describes the parameterisation, implementation and evaluation of floating-point adders a...
This paper describes the parameterisation, implementation and eval-uation of floating-point adders a...
International audienceThis paper proposes an innovative Floating Point (FP) architecture for Variabl...
International audienceThe popularity and community-driven development model of RISCV have opened man...
International audienceOptimizing compilers for high performance computing only support IEEE 754 floa...
Most of the Floating-Point (FP) hardware units support the formats and the operations specified in t...
Floating point arithmetic is a common requirement in signal processing, image processing and real ti...
Abstract:- Floating point arithmetic is widely used in many areas. IEEE Standard 754 floating point ...
International audienceThere is a growing interest in the use of reduced-precision arithmetic, exacer...
International audienceFloating-Point (FP) units in processors are generally limited to supporting a ...
Abstract: Floating point numbers are one possible way of representing real numbers in binary format;...
Reference Librarian Date Field Programmable Gate Arrays (FPGAs) are frequently used to accelerate si...
International audienceFloating-Point (FP) computation using standard IEEE formats has a significant ...
Most scientific computations use double precision floating point numbers. Recently, posits as an add...
Using standard Floating-Point (FP) formats for computation leads to significant hardware overhead si...
This paper describes the parameterisation, implementation and evaluation of floating-point adders a...
This paper describes the parameterisation, implementation and eval-uation of floating-point adders a...