In this work, an integrated random number generator based on oscillator sampling method is presented. The random number generator exploits a continuous-time chaotic circuit as the entropy source. A source-coupled multivibrator is used to transform the generated chaotic signal into jittered oscillations required in the oscillator sampling method. The random number generator circuit is fabricated using 0.35 mu m CMOS process. The circuit is supplied with +/- 1.65V and occupies an area of 0.25mm(2). The throughput of the RNG is 2Mbit/s and its average power consumption is measured as 35mW at its typical throughput. It is shown that experimental binary data obtained from the fabricated IC pass the four tests of FIPS-140-1 test suite
We present the design and the validation by means of suitably improved randomness tests of two diff...
22nd IEEE Signal Processing and Communications Applications Conference (SIU) -- APR 23-25, 2014 -- K...
This paper presents a new chaos-based True Random Number Generator (TRNG) with a decreased voltage s...
In this work, an integrated random number generator based on oscillator sampling method is presented...
In this work, an integrated random number generator based on oscillator sampling method is presented...
In this work a new random number generator circuit using continuous-time chaos is described. The cir...
An integrated continuous-time chaotic oscillator capable of operating at very high frequencies is pr...
This work proposes a random numbers generator for application in the field of secure communications....
A new random number generator design from a double-scroll chaos is presented. The structure is based...
A technique to produce many high speed uncorrelated truly binary random number generators (RNGs) uti...
This paper proposes an ultra-low power CMOS random number generator (RING), which is based on an osc...
We present the design and the validation by means of suitably improved randomness tests of two diffe...
In this work an original CMOS implementation of a discrete-time deterministic-chaos algorithm for ra...
As faster Random Number Generators become available, the possibility to improve the accuracy of rand...
We present the design and the validation by means of suitably improved randomness tests of two diff...
22nd IEEE Signal Processing and Communications Applications Conference (SIU) -- APR 23-25, 2014 -- K...
This paper presents a new chaos-based True Random Number Generator (TRNG) with a decreased voltage s...
In this work, an integrated random number generator based on oscillator sampling method is presented...
In this work, an integrated random number generator based on oscillator sampling method is presented...
In this work a new random number generator circuit using continuous-time chaos is described. The cir...
An integrated continuous-time chaotic oscillator capable of operating at very high frequencies is pr...
This work proposes a random numbers generator for application in the field of secure communications....
A new random number generator design from a double-scroll chaos is presented. The structure is based...
A technique to produce many high speed uncorrelated truly binary random number generators (RNGs) uti...
This paper proposes an ultra-low power CMOS random number generator (RING), which is based on an osc...
We present the design and the validation by means of suitably improved randomness tests of two diffe...
In this work an original CMOS implementation of a discrete-time deterministic-chaos algorithm for ra...
As faster Random Number Generators become available, the possibility to improve the accuracy of rand...
We present the design and the validation by means of suitably improved randomness tests of two diff...
22nd IEEE Signal Processing and Communications Applications Conference (SIU) -- APR 23-25, 2014 -- K...
This paper presents a new chaos-based True Random Number Generator (TRNG) with a decreased voltage s...